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Lioncash d0274f412a safe_ops: Avoid signed overflow in Negate() 
Negation of values such as -9223372036854775808 can't be represented in
signed equivalents (such as long long), leading to signed overflow.
Therefore, we can just invert bits and add 1 to perform this behavior
with unsigned arithmetic.
 2020-04-22 20:46:21 +01:00
Lioncash af3e23b224 simd_scalar_shift_by_immediate: Implement FCVT{ZS, ZU} (vector, fixed-point)'s scalar double/single-precision variant 2020-04-22 20:46:21 +01:00
Lioncash 91abf87169 simd_scalar_two_register_misc: Implement FCVT{AS, AU, MS, MU, NS, NU, PS, PU, ZS, ZU} (vector)'s scalar double/single-precision variants 
We can simply implement this in terms of the fixed-point IR opcodes.
 2020-04-22 20:46:21 +01:00
Lioncash 5b39e8dcf8 tests: Silence warnings in skyeye code 
Gets rid of warning noise when compiling the tests.
 2020-04-22 20:46:21 +01:00
Lioncash 0ec8dac660 emit_x64: Remove FPSCR_RoundTowardsZero() virtual function from EmitContext struct 
This code was bugged in that we were comparing if the rounding mode was
not equal to rounding towards zero. Fortunately, however, nothing uses
this function anymore, and there's already the more general
FPSCR_RMode() available, so this can be removed entirely.
 2020-04-22 20:46:21 +01:00
Lioncash fd92e2f186 emit_x64: Add missing <array> include 
Commit 755adef62e504a8d616de9dda8937d2428a9471b introduced a helper
alias for std::array, eliminating the need to manually type out sizes
for them, however I forgot to add the include for <array>
 2020-04-22 20:46:21 +01:00
Lioncash f939bd0228 emit_x64_vector{_floating_point}: Add helper alias for sizing arrays relative to vector width 
Avoids needing to remember to specify the proper size of the arrays, all
that's needed is to specify the type of the array and the size will
automatically be deduced from it. This helps prevent potential oversized
or undersized arrays from being specified.
 2020-04-22 20:46:21 +01:00
MerryMage 58f3399032 A64/PopRSBHint: Prevent RETing to a guest PC of ~0ull from crashing the jit 2020-04-22 20:46:21 +01:00
MerryMage 4525209bab tests: Add FABD test 2020-04-22 20:46:21 +01:00
MerryMage e18fca17dc A64: Implement FABD in terms of existing IR instructions 
Fixes NaN issue. Closes #306.
 2020-04-22 20:46:21 +01:00
MerryMage 1dbe9d95e6 FPRoundInt: Final FPRound based on new sign 
While this shouldn't change any of the results in theory, it's just logically more consistent
 2020-04-22 20:46:21 +01:00
MerryMage 83be491875 emit_x64_floating_point: SSE4.1 implementation of EmitFPRound 2020-04-22 20:46:20 +01:00
MerryMage a40127a054 A64: Implement FRINTX, FRINTI (scalar) 2020-04-22 20:46:20 +01:00
MerryMage 962fa3b65e A64: Implement FRINTP, FRINTM, FRINTZ (scalar) 2020-04-22 20:46:20 +01:00
MerryMage 5200bf41cf A64: Implement FRINTN (scalar) 2020-04-22 20:46:20 +01:00
MerryMage 8718dc1692 A64: Implement FRINTA (scalar) 2020-04-22 20:46:20 +01:00
MerryMage b228694012 IR: Implement FPRoundInt 2020-04-22 20:46:20 +01:00
MerryMage e24054f4d7 fp: Implement FPRoundInt 2020-04-22 20:46:20 +01:00
MerryMage f876e4afa2 fp: Implement FPProcessNaN 2020-04-22 20:46:20 +01:00
MerryMage 591adee443 fp/info: Add DefaultNaN 2020-04-22 20:46:20 +01:00
MerryMage 797e18cd97 fp: Move FPToFixed to its own file 2020-04-22 20:46:20 +01:00
MerryMage 295deb4035 a64_jit_state: Add FPSR.QC flag 2020-04-22 20:46:20 +01:00
Lioncash 7797bc2fb2 emit_x64_vector: Use non-scratch Use* variants of registers within EmitVectorUnsignedAbsoluteDifference() 
In some cases, a register isn't modified, depending on the branch taken,
so we can signify this by using the non-scratch variants in certain
cases.
 2020-04-22 20:46:20 +01:00
Lioncash f7f83b76b7 simd_scalar_two_register_misc: Implement scalar double/single-precision variants of FCM{EQ, GE, GT, LE, LT} (zero) 2020-04-22 20:46:20 +01:00
Lioncash 9db6d1e98b translate_arm: Remove unnecessary rotr() function 
We already have RotateRight() in our common code, so we can remove this
function and replace it with it. We can also implement ArmExpandImm_C()
in terms of ArmExpandImm().
 2020-04-22 20:46:20 +01:00
Merry c167715336 Merge pull request #309 from lioncash/typename 
cast_util: Remove unnecessary typename
 2020-04-22 20:46:20 +01:00
MerryMage 89e43867c1 A64: Implement FADDP (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 9f8a44c982 cast_util: Remove unnecessary typename 
Given we use std::aligned_storage_t, we don't need to specify
typename here. If we used std::aligned_storage, then we would need to.
 2020-04-22 20:46:19 +01:00
MerryMage 33fa65de23 A64: Implement FADDP (vector) 2020-04-22 20:46:19 +01:00
MerryMage 9dba273a8c A64: Implement SADDLP 2020-04-22 20:46:19 +01:00
MerryMage 70ff2d73b5 A64: Implement UADDLP 2020-04-22 20:46:19 +01:00
MerryMage 5563bbbd79 A64: Implement EXT 2020-04-22 20:46:19 +01:00
Merry d50eaedaa7 Merge pull request #289 from MerryMage/fptofixed 
Implement most of the scalar fp -> integer instructions
 2020-04-22 20:46:19 +01:00
Lioncash e7409fdfe4 A64: Implement UCVTF (vector, integer)'s double/single-precision variant 2020-04-22 20:46:19 +01:00
MerryMage 304cc7f61e emit_x64_floating_point: SSE4.1 implementation for FP{Double,Single}ToFixed{S,U}{32,64} 2020-04-22 20:46:19 +01:00
Lioncash 4aa4885ba7 ir: Add opcodes for vector conversion of u32/u64 to floating-point 2020-04-22 20:46:19 +01:00
MerryMage 3d9677d094 A64: Implement FCVTMU (scalar) 2020-04-22 20:46:19 +01:00
Lioncash fcae4e2418 simd_three_different: Deduplicate common implementations 
Generally, the only difference between the signed variants and the
unsigned variants is whether or not we use a sign-extension or
zero-extension, so we can simply use common functions to implement both
cases without totally duplicating code twice here.
 2020-04-22 20:46:19 +01:00
MerryMage 79c9018d60 A64: Implement FCVTMS (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 9c0d5cf15c floating_point_conversion_integer: Handle S64/U64 -> F32 conversions in SCVTF_float_int and UCVTF_float_int 2020-04-22 20:46:19 +01:00
MerryMage 49c4499a87 A64: Implement FCVTPU (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 7a84b6e8d8 ir: Add opcodes for converting S64 and U64 to single-precision floating-point values 2020-04-22 20:46:19 +01:00
MerryMage af661ef5a6 A64: Implement FCVTPS (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 066061fa50 constant_pool: Remove unnecessary std::memset from constructor 
AllocateFromCodeSpace() already zeroes out the allocated memory.
 2020-04-22 20:46:19 +01:00
MerryMage 27319822bb A64: Implement FCVTAU (scalar) 2020-04-22 20:46:19 +01:00
MerryMage 9c4f234417 fuzz_with_unicorn: Avoid self-modifying code 
* Don't immediately terminate when unicorn raises an interrupt
* Detect self-modifying code
 2020-04-22 20:46:19 +01:00
MerryMage c0c7a26314 A64: Implement FCVTAS (scalar) 2020-04-22 20:46:19 +01:00
MerryMage 9f8c6f60f5 fuzz_with_unicorn: Configure as per qemu max configuration 2020-04-22 20:46:19 +01:00
MerryMage a1965a74a0 A64: Implement FCVTNU (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 64d4e40081 tests/A32/testenv: Add type aliases for register arrays 
Allows avoiding duplicating std::array instance sizes and types.
 2020-04-22 20:46:19 +01:00