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Author SHA1 Message Date
Merry 9b09acee47 oaknut: Implement arranged accessors from DReg and QReg 2022-10-18 15:04:30 +01:00
Merry 3d420e34ae emit_arm64_data_processing: Fix LogicalShiftRight32 for immediate shift = 32 2022-10-18 15:04:30 +01:00
Merry 78e266a869 test_generator: Increase iterations 2022-10-18 15:04:30 +01:00
Merry a5f3164c38 backend/arm64/reg_alloc: Handle immediates in DefineAsExisting 2022-10-18 15:04:30 +01:00
Merry 277f7a76e9 arm64: Stub PushRSB 2022-10-18 15:04:30 +01:00
Merry ef137dd8b9 emit_arm64_data_processing: Correct ArithmeticShiftRight32 2022-10-18 15:04:30 +01:00
Merry 70d9137859 backend/arm64/reg_alloc: Handle immediates in PrepareForCall 2022-10-18 15:04:30 +01:00
Merry 187f89951d emit_arm64_data_processing: Implement Mul 2022-10-18 15:04:30 +01:00
Merry bf55920ce9 backend/arm64/reg_alloc: Support multiple locks on a location 2022-10-18 15:04:30 +01:00
Merry 6bcfaee1f4 emit_arm64_data_processing: Implement LogicalShiftRight32 2022-10-18 15:04:30 +01:00
Merry 7840caef6e emit_arm64_data_processing: Fix bug in EmitBitOp 2022-10-18 15:04:30 +01:00
Merry 02cfbb8b0b backend/arm64/reg_alloc: Generate immediates when required 2022-10-18 15:04:30 +01:00
Merry bdb41be0c5 emit_arm64_data_processing: Implement ZeroExtend 2022-10-18 15:04:30 +01:00
Merry 7ed217ff77 emit_arm64_data_processing: Implement SignExtend 2022-10-18 15:04:30 +01:00
Merry 777d9a1045 emit_arm64_data_processing: Implement ByteReverse 2022-10-18 15:04:30 +01:00
Merry 156bcecb02 emit_arm64_data_processing: Implement ArithmeticShiftRight32 2022-10-18 15:04:30 +01:00
Merry a6e761daa9 emit_arm64_a32: Fix CheckBit 2022-10-18 15:04:30 +01:00
Merry 95ae21bd41 backend/arm64: Fix Sub 2022-10-18 15:04:30 +01:00
Merry 46f4063952 backend/arm64: Implement Not 2022-10-18 15:04:30 +01:00
Merry 6ad7758165 backend/arm64: Implement AndNot 2022-10-18 15:04:30 +01:00
Merry fcd2bd600e backend/arm64: Implement Or 2022-10-18 15:04:30 +01:00
Merry 4cff0d9977 backend/arm64: Implement Eor 2022-10-18 15:04:30 +01:00
Merry 4e3fd70f6e backend/arm64: Implement And64 2022-10-18 15:04:30 +01:00
Merry 32e54481e7 github: Test arm64 backend 2022-10-18 15:04:30 +01:00
Merry 129af4f6b4 backend/arm64: Implement A32SetCpsrNZ 2022-10-18 15:04:30 +01:00
Merry 7056913b6b backend/arm64: Implement And32 2022-10-18 15:04:30 +01:00
Merry f97b520221 backend/arm64: Implement RotateRight32 2022-10-18 15:04:30 +01:00
Merry 6885f9a6d8 backend/arm64: Invalidation fixes 2022-10-18 15:04:30 +01:00
Merry eaf87ec1e4 backend/arm64: Simple implementation of memory read/write 2022-10-18 15:04:30 +01:00
Merry 77634509b5 arm64/abi: Deduplicate register code 2022-10-18 15:04:30 +01:00
Merry f3bf27c816 backend/arm64: Implement Devirtualize 2022-10-18 15:04:30 +01:00
Merry 6239eb5eb6 oaknut: dx 2022-10-18 15:04:30 +01:00
Merry 9a35946aec oaknut: align 2022-10-18 15:04:30 +01:00
Merry 2e72d69268 backend/arm64: ABI 2022-10-18 15:04:30 +01:00
Merry e1ad7ef482 oaknut: Add dw 2022-10-18 15:04:30 +01:00
Merry f74a5f262f backend/arm64/reg_alloc: RAReg is non-copyable and non-moveable 2022-10-18 15:04:30 +01:00
Merry 3a3b43b963 backend/arm64: Implement A32ClearExclusive 2022-10-18 15:04:30 +01:00
Merry 9bdff6a9aa constant_propagation_pass: Shift with non-zero value does not require c flag as input 2022-10-18 15:04:30 +01:00
Merry 5a864f41c6 backend/arm64/reg_alloc: Implement DefineAsRegister 2022-10-18 15:04:30 +01:00
Merry 16701ae6d5 backend/arm64/reg_alloc: Use NZCV instead of magic numbers 2022-10-18 15:04:30 +01:00
Merry ba00b3586c oaknut: Add common system registers 2022-10-18 15:04:30 +01:00
Merry c2ff75e29c backend/arm64: Implement Sub 2022-10-18 15:04:30 +01:00
Merry 8ac57bd6ed backend/arm64/reg_alloc: Assert on bad RAReg 2022-10-18 15:04:30 +01:00
Merry 78bc0812b9 backend/arm64/reg_alloc: More flag handling 2022-10-18 15:04:30 +01:00
Merry 21601764de backend/arm64: Implement Add 2022-10-18 15:04:30 +01:00
Merry 679efb9c44 backend/arm64: Implement A32SetCpsrNZCV 2022-10-18 15:04:30 +01:00
Merry 67df13f886 backend/arm64: Update for new C flag representation 2022-10-18 15:04:30 +01:00
Merry d69582f548 backend/arm64/reg_alloc: Tidy up HostLocInfo 2022-10-18 15:04:30 +01:00
Merry 01f28facbd abi: Add Rscratch{0,1} 2022-10-18 15:04:30 +01:00
Merry 8b41755db0 ir_emitter: Remove unused ResultAndCarryAndOverflow structure 2022-10-18 15:04:30 +01:00