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Author SHA1 Message Date
MerryMage 70ff2d73b5 A64: Implement UADDLP 2020-04-22 20:46:19 +01:00
MerryMage 5563bbbd79 A64: Implement EXT 2020-04-22 20:46:19 +01:00
Merry d50eaedaa7 Merge pull request #289 from MerryMage/fptofixed 
Implement most of the scalar fp -> integer instructions
 2020-04-22 20:46:19 +01:00
Lioncash e7409fdfe4 A64: Implement UCVTF (vector, integer)'s double/single-precision variant 2020-04-22 20:46:19 +01:00
MerryMage 304cc7f61e emit_x64_floating_point: SSE4.1 implementation for FP{Double,Single}ToFixed{S,U}{32,64} 2020-04-22 20:46:19 +01:00
Lioncash 4aa4885ba7 ir: Add opcodes for vector conversion of u32/u64 to floating-point 2020-04-22 20:46:19 +01:00
MerryMage 3d9677d094 A64: Implement FCVTMU (scalar) 2020-04-22 20:46:19 +01:00
Lioncash fcae4e2418 simd_three_different: Deduplicate common implementations 
Generally, the only difference between the signed variants and the
unsigned variants is whether or not we use a sign-extension or
zero-extension, so we can simply use common functions to implement both
cases without totally duplicating code twice here.
 2020-04-22 20:46:19 +01:00
MerryMage 79c9018d60 A64: Implement FCVTMS (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 9c0d5cf15c floating_point_conversion_integer: Handle S64/U64 -> F32 conversions in SCVTF_float_int and UCVTF_float_int 2020-04-22 20:46:19 +01:00
MerryMage 49c4499a87 A64: Implement FCVTPU (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 7a84b6e8d8 ir: Add opcodes for converting S64 and U64 to single-precision floating-point values 2020-04-22 20:46:19 +01:00
MerryMage af661ef5a6 A64: Implement FCVTPS (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 066061fa50 constant_pool: Remove unnecessary std::memset from constructor 
AllocateFromCodeSpace() already zeroes out the allocated memory.
 2020-04-22 20:46:19 +01:00
MerryMage 27319822bb A64: Implement FCVTAU (scalar) 2020-04-22 20:46:19 +01:00
MerryMage 9c4f234417 fuzz_with_unicorn: Avoid self-modifying code 
* Don't immediately terminate when unicorn raises an interrupt
* Detect self-modifying code
 2020-04-22 20:46:19 +01:00
MerryMage c0c7a26314 A64: Implement FCVTAS (scalar) 2020-04-22 20:46:19 +01:00
MerryMage 9f8c6f60f5 fuzz_with_unicorn: Configure as per qemu max configuration 2020-04-22 20:46:19 +01:00
MerryMage a1965a74a0 A64: Implement FCVTNU (scalar) 2020-04-22 20:46:19 +01:00
Lioncash 64d4e40081 tests/A32/testenv: Add type aliases for register arrays 
Allows avoiding duplicating std::array instance sizes and types.
 2020-04-22 20:46:19 +01:00
MerryMage 7d36dbcdfd A64: Implement FCVTNS (scalar) 2020-04-22 20:46:19 +01:00
Lioncash a25bacc436 tests/unicorn: Add type aliases to the Unicorn class 
Centralizes all register and vector array definitions to a single set of
aliases, so if these are ever changed, then the rest of the testing code
will follow suit without the need to manually change them.
 2020-04-22 20:46:19 +01:00
MerryMage 617ca0adf0 floating_point_conversion_integer: Refactor implementation of FCVTZS_float_int and FCVTZU_float_int 2020-04-22 20:46:19 +01:00
Lioncash a1d6a86e8c A64: Implement ADDV 2020-04-22 20:46:19 +01:00
MerryMage caaf36dfd6 IR: Initial implementation of FP{Double,Single}ToFixed{S,U}{32,64} 
This implementation just falls-back to the software floating point implementation.
 2020-04-22 20:46:19 +01:00
Lioncash 35026a6ce3 emit_x64_vector: Vectorize fallback path for EmitVectorMaxU32() 2020-04-22 20:46:19 +01:00
MerryMage 760cc3ca89 EmitContext: Expose FPCR 2020-04-22 20:46:19 +01:00
Lioncash 245c903129 simd_three_same: Join FPAbsoluteComparison() into FPCompareRegister() 
These are part of the same comparison family, so there's no real point
in keeping them separate.
 2020-04-22 20:46:19 +01:00
MerryMage 9571269552 fp/op: Implement FPToFixed 2020-04-22 20:46:19 +01:00
MerryMage 8087e8df05 mantissa_util: Implement ResidualErrorOnRightShift 
Accurately calculate residual error that is shifted out
 2020-04-22 20:46:19 +01:00
MerryMage 52ed365158 tests/fp: Add FPRound tests 2020-04-22 20:46:19 +01:00
MerryMage 8668d61881 fp/unpacked: Implement FPRound 2020-04-22 20:46:19 +01:00
MerryMage 55d590c01f FPCR: Add AHP setter and FZ16 getter 2020-04-22 20:46:19 +01:00
MerryMage 7360a2579b mp: Implement metaprogramming library 2020-04-22 20:46:19 +01:00
MerryMage 4ab029c114 fp: Implement FPUnpack 2020-04-22 20:46:19 +01:00
MerryMage 4875658917 fp: Implement FPProcessException 2020-04-22 20:46:19 +01:00
MerryMage 3cb98e1560 fp: Move fp_util to fp/util 2020-04-22 20:46:19 +01:00
MerryMage c41a38b13e fp: Add FPSR 2020-04-22 20:46:19 +01:00
MerryMage 66381352f3 fp: Add FPInfo 
Provides information about floating-point format for various bit sizes
 2020-04-22 20:46:19 +01:00
MerryMage d21659152c safe_ops: Implement safe shifting operations 
Implement shifiting operations that perform consistently across architectures
without running into undefined or implemented-defined behaviour.
 2020-04-22 20:46:19 +01:00
MerryMage b00fe23b91 bit_util: Implement MostSignificantBit 2020-04-22 20:46:19 +01:00
MerryMage 95ad0d0a66 bit_util: Use Ones to implement Bits 2020-04-22 20:46:19 +01:00
MerryMage 62b640b2fa bit_util: Add ClearBit and ModifyBit 2020-04-22 20:46:19 +01:00
MerryMage 8651c2d10e u128: Implement u128 
For when we need a 128-bit integer
 2020-04-22 20:46:19 +01:00
Lioncash 9912836b59 A64: Implement scalar double/single-precision variants of FACGE, FACGT, FCMEQ, FCMGE, FCMGT 2020-04-22 20:46:18 +01:00
MerryMage 0b97e9bd8d emit_x64_floating_point: Fix EmitFPU64ToDouble for TowardsMinusInfinity rounding mode 2020-04-22 20:46:18 +01:00
MerryMage a2eb9a02e0 backend_x86: Add FPSCR_RMode to EmitContext 2020-04-22 20:46:18 +01:00
MerryMage 8c65d58cb8 tests/A64: Randomize FPCR.RMode for single random instruction 2020-04-22 20:46:18 +01:00
MerryMage d875c08ebf fp: Extract common RoundingMode enum 2020-04-22 20:46:18 +01:00
Lioncash 7d52d7bef8 inst_gen: Compress loop into std::any_of in IsInvalidInstruction() 
Same behavior, but using a more self-documenting function.
 2020-04-22 20:46:18 +01:00