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- Faster sweeps by changing 2.LO only when necessary and using 400kHz I2C frequency - Added FPGA settings for selectable ADC samplerate - Additional measurement with different ADC samplerate when signal ID is on to remove ADC images |
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| FPGA | ||
| Hardware | ||
| Software | ||
| .gitignore | ||
| AssembleFirmware.py | ||