LibreVNA/FPGA/Generator/ipcore_dir
2022-06-10 23:10:53 +02:00
..
.gitignore Untested generator FPGA image 2022-06-08 02:06:08 +02:00
AMMult.xco Untested generator FPGA image 2022-06-08 02:06:08 +02:00
AMMult.xise Untested generator FPGA image 2022-06-08 02:06:08 +02:00
DSP48.xco Untested generator FPGA image 2022-06-08 02:06:08 +02:00
ModulationMemory.xco simplified modulation with lookup table, updated documentation 2022-06-10 23:10:53 +02:00
ModulationMemory.xise simplified modulation with lookup table, updated documentation 2022-06-10 23:10:53 +02:00
PLL.xco Untested generator FPGA image 2022-06-08 02:06:08 +02:00
PLL.xise Untested generator FPGA image 2022-06-08 02:06:08 +02:00
SampleMemory.xco Untested generator FPGA image 2022-06-08 02:06:08 +02:00
SampleMemory.xise Untested generator FPGA image 2022-06-08 02:06:08 +02:00
VCO_Mem.xco Untested generator FPGA image 2022-06-08 02:06:08 +02:00
VCO_Mem.xise Generator FPGA image test bench 2022-06-08 17:17:15 +02:00
wide_mult.xco Untested generator FPGA image 2022-06-08 02:06:08 +02:00
wide_mult.xise Untested generator FPGA image 2022-06-08 02:06:08 +02:00