Commit graph

8 commits

Author SHA1 Message Date
Jan Käberich f889ec854b Test of DFT implementation in FPGA 2020-11-08 14:38:31 +01:00
Jan Käberich 6bc6b1d202 Speed improvements 2020-10-03 21:56:09 +02:00
Jan Käberich 926392e5b9 Bugfixes and speed improvements 2020-09-26 23:34:31 +02:00
Jan Käberich d32f7a61ee Bugfix: only enable highband source once per sweep 2020-09-20 22:51:51 +02:00
Jan Käberich fc3ce7a828 Improved spectrum analyzer mode
- Faster sweeps by changing 2.LO only when necessary and using 400kHz I2C frequency
- Added FPGA settings for selectable ADC samplerate
- Additional measurement with different ADC samplerate when signal ID is on to remove ADC images
2020-09-17 19:54:03 +02:00
Jan Käberich d9d00b8c71 Windowing option added to sampling 2020-09-16 16:13:06 +02:00
Jan Käberich 7d9d5e27eb different settling time/samples per point in sweep 2020-09-14 11:03:37 +02:00
Jan Käberich 6960498fcb HAL layer for VNA functionality to use similar firmware on both hardware revisions 2020-09-11 23:08:30 +02:00
Renamed from Software/VNA_embedded/Application/Drivers/FPGA.hpp (Browse further)