jankae/LibreVNA
1
0
Fork 0
mirror of https://github.com/jankae/LibreVNA.git synced 2026-01-29 03:44:18 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity
1055 commits 11 branches 20 tags 314 MiB
Commit graph

5 commits

Author SHA1 Message Date
Jan Käberich a4faeb28b0 Working dwell time feature 
- Bugfixes:
	- improve SPI timing in FPGA
	- fix markers and reduce CPU load when using markers with fast traces
- New features:
	- dwell time configurable in acquisition toolbar
	- PLL settling delay in device configuration
	- device configuration persistent across power cycles
 2025-01-03 14:36:10 +01:00
Jan Käberich 24314e2361 WIP: rework 2.LO + add dwell time 2025-01-02 19:16:53 +01:00
Jan Käberich f889ec854b Test of DFT implementation in FPGA 2020-11-08 14:38:31 +01:00
Jan Käberich 926392e5b9 Bugfixes and speed improvements 2020-09-26 23:34:31 +02:00
Jan Käberich 16f050a11e FPGA project adapted to new pinout 2020-08-30 16:19:18 +02:00