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Improving AFC
This commit is contained in:
Andy CA6JAU
parent
c1ec2f6fca
commit
dce3d64483
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@ -171,10 +171,17 @@ void CIO::ifConf()
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div2 = 1U;
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}
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#if defined(ADF7021_ENABLE_AFC)
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if( div2 == 1U )
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divider = (m_frequency_rx - 100000 + 1000) / (ADF7021_PFD / 2U);
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else
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divider = (m_frequency_rx - 100000 + 2000) / ADF7021_PFD;
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#else
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if( div2 == 1U )
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divider = (m_frequency_rx - 100000) / (ADF7021_PFD / 2U);
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else
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divider = (m_frequency_rx - 100000) / ADF7021_PFD;
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#endif
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N_divider = floor(divider);
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divider = (divider - N_divider) * 32768;
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87
ADF7021.h
87
ADF7021.h
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@ -61,9 +61,9 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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#define ADF7021_DISC_BW_DSTAR 522U // K=85
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#define ADF7021_DISC_BW_DMR 392U // K=32
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#define ADF7021_DISC_BW_YSF 343U // K=28
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#define ADF7021_DISC_BW_P25 393U // K=32
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#define ADF7021_DISC_BW_DMR 393U // K=32
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#define ADF7021_DISC_BW_YSF 344U // K=28
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#define ADF7021_DISC_BW_P25 394U // K=32
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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@ -77,17 +77,24 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// IF CAL (fine cal, defaults) (REG 06)
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#define ADF7021_REG6 0x05070E16
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// AFC (on) (REG 10)
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#define ADF7021_REG10_DSTAR 0x0C96473A
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#define ADF7021_REG10_DMR 0x019E473A
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#define ADF7021_REG10_YSF 0x029E473A
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#define ADF7021_REG10_P25 0x029E473A
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// AFC configuration (REG 10)
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#if defined(ADF7021_ENABLE_AFC)
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#define ADF7021_REG10_DSTAR 0x0496473A
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#define ADF7021_REG10_DMR 0x049E473A
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#define ADF7021_REG10_YSF 0x049E473A
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#define ADF7021_REG10_P25 0x049E473A
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#else
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#define ADF7021_REG10_DSTAR 0x0496472A
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#define ADF7021_REG10_DMR 0x049E472A
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#define ADF7021_REG10_YSF 0x049E472A
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#define ADF7021_REG10_P25 0x049E472A
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#endif
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// Slicer threshold for 4FSK demodulator (REG 13)
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#define ADF7021_SLICER_TH_DSTAR 0U
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#define ADF7021_SLICER_TH_DMR 53U
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#define ADF7021_SLICER_TH_YSF 68U
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#define ADF7021_SLICER_TH_P25 46U
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#define ADF7021_SLICER_TH_DMR 54U
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#define ADF7021_SLICER_TH_YSF 75U
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#define ADF7021_SLICER_TH_P25 52U
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/****** Support for 19.6800 MHz TCXO (original RF7021SE boards) ******/
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#elif defined(ADF7021_19_6800)
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@ -116,9 +123,9 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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#define ADF7021_DISC_BW_DSTAR 597U // K=85
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#define ADF7021_DISC_BW_DMR 392U // K=32
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#define ADF7021_DISC_BW_YSF 343U // K=28
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#define ADF7021_DISC_BW_P25 393U // K=32
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#define ADF7021_DISC_BW_DMR 393U // K=32
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#define ADF7021_DISC_BW_YSF 344U // K=28
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#define ADF7021_DISC_BW_P25 394U // K=32
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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@ -132,17 +139,24 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// IF CAL (coarse cal, defaults) (REG 06)
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#define ADF7021_REG6 0x050972C6
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// AFC (on) (REG 10)
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#define ADF7021_REG10_DSTAR 0x0C96355A
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#define ADF7021_REG10_DMR 0x019E355A
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#define ADF7021_REG10_YSF 0x029E355A
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#define ADF7021_REG10_P25 0x029E355A
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// AFC (REG 10)
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#if defined(ADF7021_ENABLE_AFC)
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#define ADF7021_REG10_DSTAR 0x0496355A
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#define ADF7021_REG10_DMR 0x049E355A
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#define ADF7021_REG10_YSF 0x049E355A
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#define ADF7021_REG10_P25 0x049E355A
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#else
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#define ADF7021_REG10_DSTAR 0x0496354A
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#define ADF7021_REG10_DMR 0x049E354A
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#define ADF7021_REG10_YSF 0x049E354A
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#define ADF7021_REG10_P25 0x049E354A
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#endif
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// Slicer threshold for 4FSK demodulator (REG 13)
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#define ADF7021_SLICER_TH_DSTAR 0U
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#define ADF7021_SLICER_TH_DMR 53U
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#define ADF7021_SLICER_TH_YSF 68U
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#define ADF7021_SLICER_TH_P25 46U
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#define ADF7021_SLICER_TH_DMR 54U
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#define ADF7021_SLICER_TH_YSF 75U
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#define ADF7021_SLICER_TH_P25 52U
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/****** Support for 12.2880 MHz TCXO ******/
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#elif defined(ADF7021_12_2880)
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@ -171,9 +185,9 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// Discriminator bandwith, demodulator (REG 04)
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// Bug in ADI evaluation software, use datasheet formula (4FSK)
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#define ADF7021_DISC_BW_DSTAR 522U // K=85
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#define ADF7021_DISC_BW_DMR 490U // K=32
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#define ADF7021_DISC_BW_YSF 429U // K=28
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#define ADF7021_DISC_BW_P25 491U // K=32
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#define ADF7021_DISC_BW_DMR 491U // K=32
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#define ADF7021_DISC_BW_YSF 430U // K=28
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#define ADF7021_DISC_BW_P25 493U // K=32
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// Post demodulator bandwith (REG 04)
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#define ADF7021_POST_BW_DSTAR 10U
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@ -187,17 +201,24 @@ www.analog.com/media/en/technical-documentation/data-sheets/ADF7021.pdf
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// IF CAL (fine cal, defaults) (REG 06)
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#define ADF7021_REG6 0x0505EBB6
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// AFC (on, defaults) (REG 10)
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#define ADF7021_REG10_DSTAR 0x0C96557A
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#define ADF7021_REG10_DMR 0x019E557A
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#define ADF7021_REG10_YSF 0x029E557A
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#define ADF7021_REG10_P25 0x029E557A
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// AFC (REG 10)
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#if defined(ADF7021_ENABLE_AFC)
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#define ADF7021_REG10_DSTAR 0x0496557A
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#define ADF7021_REG10_DMR 0x049E557A
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#define ADF7021_REG10_YSF 0x049E557A
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#define ADF7021_REG10_P25 0x049E557A
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#else
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#define ADF7021_REG10_DSTAR 0x0496556A
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#define ADF7021_REG10_DMR 0x049E556A
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#define ADF7021_REG10_YSF 0x049E556A
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#define ADF7021_REG10_P25 0x049E556A
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#endif
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// Slicer threshold for 4FSK demodulator (REG 13)
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#define ADF7021_SLICER_TH_DSTAR 0U
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#define ADF7021_SLICER_TH_DMR 53U
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#define ADF7021_SLICER_TH_YSF 68U
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#define ADF7021_SLICER_TH_P25 46U
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#define ADF7021_SLICER_TH_DMR 54U
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#define ADF7021_SLICER_TH_YSF 75U
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#define ADF7021_SLICER_TH_P25 52U
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#endif
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