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109 lines
3 KiB
C++
109 lines
3 KiB
C++
#pragma once
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namespace shader::ir::sop1 {
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enum Op {
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MOV_B32 = 3,
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MOV_B64,
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CMOV_B32,
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CMOV_B64,
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NOT_B32,
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NOT_B64,
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WQM_B32,
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WQM_B64,
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BREV_B32,
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BREV_B64,
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BCNT0_I32_B32,
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BCNT0_I32_B64,
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BCNT1_I32_B32,
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BCNT1_I32_B64,
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FF0_I32_B32,
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FF0_I32_B64,
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FF1_I32_B32,
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FF1_I32_B64,
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FLBIT_I32_B32,
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FLBIT_I32_B64,
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FLBIT_I32,
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FLBIT_I32_I64,
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SEXT_I32_I8,
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SEXT_I32_I16,
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BITSET0_B32,
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BITSET0_B64,
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BITSET1_B32,
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BITSET1_B64,
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GETPC_B64,
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SETPC_B64,
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SWAPPC_B64,
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AND_SAVEEXEC_B64 = 36,
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OR_SAVEEXEC_B64,
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XOR_SAVEEXEC_B64,
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ANDN2_SAVEEXEC_B64,
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ORN2_SAVEEXEC_B64,
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NAND_SAVEEXEC_B64,
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NOR_SAVEEXEC_B64,
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XNOR_SAVEEXEC_B64,
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QUADMASK_B32,
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QUADMASK_B64,
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MOVRELS_B32,
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MOVRELS_B64,
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MOVRELD_B32,
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MOVRELD_B64,
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CBRANCH_JOIN,
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ABS_I32 = 52,
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MOV_FED_B32,
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OpCount
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};
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inline const char *getInstructionName(unsigned id) {
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switch (id) {
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case MOV_B32: return "s_mov_b32";
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case MOV_B64: return "s_mov_b64";
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case CMOV_B32: return "s_cmov_b32";
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case CMOV_B64: return "s_cmov_b64";
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case NOT_B32: return "s_not_b32";
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case NOT_B64: return "s_not_b64";
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case WQM_B32: return "s_wqm_b32";
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case WQM_B64: return "s_wqm_b64";
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case BREV_B32: return "s_brev_b32";
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case BREV_B64: return "s_brev_b64";
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case BCNT0_I32_B32: return "s_bcnt0_i32_b32";
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case BCNT0_I32_B64: return "s_bcnt0_i32_b64";
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case BCNT1_I32_B32: return "s_bcnt1_i32_b32";
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case BCNT1_I32_B64: return "s_bcnt1_i32_b64";
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case FF0_I32_B32: return "s_ff0_i32_b32";
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case FF0_I32_B64: return "s_ff0_i32_b64";
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case FF1_I32_B32: return "s_ff1_i32_b32";
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case FF1_I32_B64: return "s_ff1_i32_b64";
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case FLBIT_I32_B32: return "s_flbit_i32_b32";
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case FLBIT_I32_B64: return "s_flbit_i32_b64";
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case FLBIT_I32: return "s_flbit_i32";
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case FLBIT_I32_I64: return "s_flbit_i32_i64";
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case SEXT_I32_I8: return "s_sext_i32_i8";
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case SEXT_I32_I16: return "s_sext_i32_i16";
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case BITSET0_B32: return "s_bitset0_b32";
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case BITSET0_B64: return "s_bitset0_b64";
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case BITSET1_B32: return "s_bitset1_b32";
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case BITSET1_B64: return "s_bitset1_b64";
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case GETPC_B64: return "s_getpc_b64";
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case SETPC_B64: return "s_setpc_b64";
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case SWAPPC_B64: return "s_swappc_b64";
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case AND_SAVEEXEC_B64: return "s_and_saveexec_b64";
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case OR_SAVEEXEC_B64: return "s_or_saveexec_b64";
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case XOR_SAVEEXEC_B64: return "s_xor_saveexec_b64";
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case ANDN2_SAVEEXEC_B64: return "s_andn2_saveexec_b64";
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case ORN2_SAVEEXEC_B64: return "s_orn2_saveexec_b64";
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case NAND_SAVEEXEC_B64: return "s_nand_saveexec_b64";
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case NOR_SAVEEXEC_B64: return "s_nor_saveexec_b64";
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case XNOR_SAVEEXEC_B64: return "s_xnor_saveexec_b64";
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case QUADMASK_B32: return "s_quadmask_b32";
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case QUADMASK_B64: return "s_quadmask_b64";
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case MOVRELS_B32: return "s_movrels_b32";
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case MOVRELS_B64: return "s_movrels_b64";
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case MOVRELD_B32: return "s_movreld_b32";
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case MOVRELD_B64: return "s_movreld_b64";
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case CBRANCH_JOIN: return "s_cbranch_join";
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case ABS_I32: return "s_abs_i32";
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case MOV_FED_B32: return "s_mov_fed_b32";
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}
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return nullptr;
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}
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}
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