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https://github.com/RPCSX/rpcsx.git
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Add atomic_t<>::try_dec instead of fetch_dec_sat Add atomic_t<>::try_inc GDBDebugServer is broken (needs rewrite) Removed old_thread class (former named_thread) Removed storing/rethrowing exceptions from thread Emu.Stop doesn't inject an exception anymore task_stack helper class removed thread_base simplified (no shared_from_this) thread_ctrl::spawn simplified (creates detached thread) Implemented overrideable thread detaching logic Disabled cellAdec, cellDmux, cellFsAio SPUThread renamed to spu_thread RawSPUThread removed, spu_thread used instead Disabled deriving from ppu_thread Partial support for thread renaming lv2_timer... simplified, screw it idm/fxm: butchered support for on_stop/on_init vm: improved allocation structure (added size)
112 lines
2.4 KiB
C++
112 lines
2.4 KiB
C++
#pragma once
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#include "Utilities/File.h"
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#include "SPUThread.h"
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#include <vector>
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#include <bitset>
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#include <memory>
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#include <string>
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#include <deque>
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// Helper class
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class spu_cache
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{
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fs::file m_file;
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public:
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spu_cache(const std::string& loc);
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~spu_cache();
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operator bool() const
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{
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return m_file.operator bool();
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}
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std::deque<std::vector<u32>> get();
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void add(const std::vector<u32>& func);
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static void initialize();
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};
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// SPU Recompiler instance base class
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class spu_recompiler_base
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{
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protected:
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u32 m_pos;
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u32 m_size;
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// Bit indicating start of the block
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std::bitset<0x10000> m_block_info;
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// GPR modified by the instruction (-1 = not set)
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std::array<u8, 0x10000> m_regmod;
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// List of possible targets for the instruction (entry shouldn't exist for simple instructions)
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std::unordered_map<u32, std::basic_string<u32>, value_hash<u32, 2>> m_targets;
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// List of block predecessors
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std::unordered_map<u32, std::basic_string<u32>, value_hash<u32, 2>> m_preds;
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// List of function entry points and return points (set after BRSL, BRASL, BISL, BISLED)
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std::bitset<0x10000> m_entry_info;
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// Compressed address of unique entry point for each instruction
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std::array<u16, 0x10000> m_entry_map{};
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std::shared_ptr<spu_cache> m_cache;
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private:
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// For private use
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std::bitset<0x10000> m_bits;
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public:
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spu_recompiler_base();
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virtual ~spu_recompiler_base();
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// Initialize
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virtual void init() = 0;
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// Get pointer to the trampoline at given position
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virtual spu_function_t get(u32 lsa) = 0;
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// Compile function
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virtual spu_function_t compile(std::vector<u32>&&) = 0;
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// Default dispatch function fallback (second arg is unused)
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static void dispatch(spu_thread&, void*, u8* rip);
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// Target for the unresolved patch point (second arg is unused)
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static void branch(spu_thread&, void*, u8* rip);
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// Get the block at specified address
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std::vector<u32> block(const be_t<u32>* ls, u32 lsa);
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// Print analyser internal state
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void dump(std::string& out);
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// Create recompiler instance (ASMJIT)
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static std::unique_ptr<spu_recompiler_base> make_asmjit_recompiler();
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// Create recompiler instance (LLVM)
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static std::unique_ptr<spu_recompiler_base> make_llvm_recompiler();
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enum : u8
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{
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s_reg_lr = 0,
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s_reg_sp = 1,
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s_reg_80 = 80,
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s_reg_127 = 127,
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s_reg_mfc_eal,
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s_reg_mfc_lsa,
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s_reg_mfc_tag,
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s_reg_mfc_size,
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// Max number of registers (for m_regmod)
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s_reg_max
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};
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};
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