mirror of
https://github.com/RPCSX/rpcsx.git
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c37905e465
move module initialization into a module manager, still has some issues like stopping not working and debug crashing add #idef 0 to modules that aren't in the windows project don't double initialize and don't de-initialize for now, since many modules don't expect it and it leads to many errors remove duplicate module lists for empty modules and implemented ones, make Module non-copyable but movable add secondary project, no real use for it now add some memleak config to the emucore and add asmjit path to rpcs3 small rebase error fixed to get it to compile again add filters for emucore re-add the module manager and static file WIP commit, linker errors abound some more abstraction layer stuff fix the remaining linker errors, re-enable platform specific mouse, pad and keyboard handlers rebasing fix memset undefined and re() usage of se_t before declaration Add wxGUI define by default for cmake builds fix copy constructors of Datetime header fix copy constructors of other wx interface classes remove static declarations of global variables make wxGLCanvas constructor non-ambiguous even with wx2.8. compat mode, fix wrong std::exception constructor calls remove duplicate definition for FromUTF8 and ToUTF8 temp changes
96 lines
1.7 KiB
C++
96 lines
1.7 KiB
C++
#pragma once
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#include "Emu/ARMv7/ARMv7Opcodes.h"
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#include "Emu/CPU/CPUDisAsm.h"
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#include "Emu/Memory/Memory.h"
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static const char* g_arm_cond_name[16] =
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{
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"eq", "ne", "cs", "cc",
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"mi", "pl", "vs", "vc",
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"hi", "ls", "ge", "lt",
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"gt", "le", "al", "al",
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};
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class ARMv7DisAsm
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: public CPUDisAsm
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, public ARMv7Opcodes
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{
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public:
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ARMv7DisAsm(CPUDisAsmMode mode) : CPUDisAsm(mode)
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{
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}
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protected:
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virtual u32 DisAsmBranchTarget(const s32 imm)
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{
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return dump_pc + imm;
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}
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std::string GetRegsListString(u16 regs_list)
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{
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std::string regs_str;
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for(u16 mask=0x1, i=0; mask; mask <<= 1, i++)
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{
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if(regs_list & mask)
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{
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if(!regs_str.empty())
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{
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regs_str += ", ";
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}
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regs_str += g_arm_reg_name[i];
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}
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}
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return regs_str;
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}
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void NULL_OP()
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{
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Write("null");
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}
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void PUSH(u16 regs_list)
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{
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Write(fmt::Format("push {%s}", GetRegsListString(regs_list).c_str()));
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}
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void POP(u16 regs_list)
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{
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Write(fmt::Format("pop {%s}", GetRegsListString(regs_list).c_str()));
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}
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void NOP()
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{
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Write("nop");
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}
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void B(u8 cond, u32 imm, u8 intstr_size)
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{
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if((cond & 0xe) == 0xe)
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{
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Write(fmt::Format("b 0x%x", DisAsmBranchTarget(imm) + intstr_size));
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}
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else
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{
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Write(fmt::Format("b[%s] 0x%x", g_arm_cond_name[cond], DisAsmBranchTarget(imm) + intstr_size));
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}
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}
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virtual void CBZ(u8 op, u32 imm, u8 rn, u8 intstr_size)
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{
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Write(fmt::Format("cb%sz 0x%x,%s", (op ? "n" : ""), DisAsmBranchTarget(imm) + intstr_size, g_arm_reg_name[rn]));
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}
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void BL(u32 imm, u8 intstr_size)
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{
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Write(fmt::Format("bl 0x%x", DisAsmBranchTarget(imm) + intstr_size));
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}
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void UNK(const u16 code0, const u16 code1)
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{
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Write(fmt::Format("Unknown/Illegal opcode! (0x%04x : 0x%04x)", code0, code1));
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}
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};
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