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stx::atomic2 is a "fat atomic" for use with multi_cas. stx::multi_cas is minimal transaction routine.
309 lines
5.8 KiB
C++
309 lines
5.8 KiB
C++
#include "atomic2.hpp"
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#include "Utilities/JIT.h"
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#include "Utilities/asm.h"
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#include "Utilities/sysinfo.h"
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//
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static const bool s_use_rtm = utils::has_rtm();
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// 4095 records max
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static constexpr u64 s_rec_gcount = 4096 / 64;
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// Global record pool
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static stx::multi_cas_record s_records[s_rec_gcount * 64]{};
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// Allocation bits (without first element)
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static atomic_t<u64> s_rec_bits[s_rec_gcount]{1};
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static constexpr u64 s_state_mask = 3;
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static constexpr u64 s_state_undef = 0;
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static constexpr u64 s_state_failure = 1;
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static constexpr u64 s_state_success = 2;
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static constexpr u64 s_ref_mask = ~s_state_mask;
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static constexpr u64 s_ref_one = s_state_mask + 1;
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static u64 rec_alloc()
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{
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const u32 start = __rdtsc();
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for (u32 i = 0;; i++)
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{
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const u32 group = (i + start) % s_rec_gcount;
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const auto [bits, ok] = s_rec_bits[group].fetch_op([](u64& bits)
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{
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if (~bits)
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{
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// Set lowest clear bit
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bits |= bits + 1;
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return true;
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}
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return false;
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});
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if (ok)
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{
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// Find lowest clear bit
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return group * 64 + utils::cnttz64(~bits, false);
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}
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}
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// TODO: unreachable
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std::abort();
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return 0;
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}
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static bool cmpxchg16(s64(&dest)[2], s64(&cmp_res)[2], s64 exch_high, s64 exch_low)
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{
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#ifdef _MSC_VER
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return !!_InterlockedCompareExchange128(dest, exch_high, exch_low, cmp_res);
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#else
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s64 exch[2]{exch_low, exch_high};
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return __atomic_compare_exchange(&dest, &cmp_res, &exch, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
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#endif
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}
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bool stx::multi_cas_record::commit() const noexcept
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{
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// Transaction cancelled
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if (m_count == 0)
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{
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return true;
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}
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// Try TSX if available
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if (s_use_rtm)
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{
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// TODO
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}
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static auto rec_unref = [](u64 id)
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{
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if (id && id < s_rec_gcount * 64)
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{
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auto [_, ok] = s_records[id].m_state.fetch_op([](u64& state)
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{
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if (state < s_ref_one)
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{
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return 0;
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}
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state -= s_ref_one;
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if (state < s_ref_one)
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{
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state = 0;
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return 2;
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}
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return 1;
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});
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if (ok > 1)
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{
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s_rec_bits[id / 64] &= ~(u64{1} << (id % 64));
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}
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}
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};
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// Helper function to complete successful transaction
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static auto rec_complete = [](u64 id)
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{
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for (u32 i = 0; i < s_records[id].m_count; i++)
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{
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auto& item = s_records[id].m_list[i];
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atomic2 cmp;
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cmp.m_data[0] = item.m_old;
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cmp.m_data[1] = id;
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if (item.m_addr->load() == item.m_old && atomic_storage<s64>::load(item.m_addr->m_data[1]) == id)
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{
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if (cmpxchg16(item.m_addr->m_data, cmp.m_data, 0, item.m_new))
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{
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}
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}
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}
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};
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// Helper function to deal with existing transaction
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static auto rec_try_abort = [](u64 id) -> u64
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{
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if (id >= s_rec_gcount * 64)
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{
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std::abort();
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}
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auto [_old, ok] = s_records[id].m_state.fetch_op([](u64& state)
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{
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if (state < s_ref_one)
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{
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// Don't reference if no references
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return false;
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}
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if ((state & s_state_mask) == s_state_undef)
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{
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// Break transaction if possible
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state |= s_state_failure;
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}
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state += s_ref_one;
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return true;
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});
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if (!ok)
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{
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return 0;
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}
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if ((_old & s_state_mask) != s_state_success)
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{
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// Allow to overwrite failing transaction
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return id;
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}
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// Help to complete
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rec_complete(id);
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rec_unref(id);
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return 0;
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};
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// Single CAS path
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if (m_count == 1)
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{
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atomic2 cmp;
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cmp.m_data[0] = m_list[0].m_old;
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cmp.m_data[1] = 0;
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while (auto ptr = m_list[0].m_addr)
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{
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if (ptr->load() != m_list[0].m_old)
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{
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return false;
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}
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cmp.m_data[1] = atomic_storage<s64>::load(ptr->m_data[1]);
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if (!cmp.m_data[1] && cmpxchg16(ptr->m_data, cmp.m_data, 0, m_list[0].m_new))
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{
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return true;
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}
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else if (cmp.m_data[0] != m_list[0].m_old)
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{
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return false;
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}
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else if (cmp.m_data[1])
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{
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if (u64 _id = rec_try_abort(cmp.m_data[1]))
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{
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if (cmpxchg16(ptr->m_data, cmp.m_data, 0, m_list[0].m_new))
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{
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rec_unref(_id);
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return true;
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}
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rec_unref(_id);
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}
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else
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{
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return false;
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}
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}
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}
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// Unreachable
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std::abort();
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}
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// Allocate global record and copy data
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const u64 id = rec_alloc();
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for (u32 i = 0; i < (m_count / 2 + 1); i++)
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{
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std::memcpy(s_records[id].m_list + i * 2, m_list + i * 2, sizeof(multi_cas_item) * 2);
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}
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s_records[id].m_count = m_count;
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s_records[id].m_state = s_ref_one;
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// Try to install CAS items
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for (u32 i = 0; i < m_count && (s_records[id].m_state & s_state_mask) == s_state_undef; i++)
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{
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atomic2 cmp;
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cmp.m_data[0] = m_list[i].m_old;
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cmp.m_data[1] = 0;
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while (auto ptr = m_list[i].m_addr)
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{
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if (ptr->load() != m_list[i].m_old)
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{
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s_records[id].m_state |= s_state_failure;
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break;
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}
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cmp.m_data[1] = atomic_storage<s64>::load(ptr->m_data[1]);
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if (!cmp.m_data[1] && cmpxchg16(ptr->m_data, cmp.m_data, id, m_list[i].m_old))
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{
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break;
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}
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else if (cmp.m_data[0] != m_list[i].m_old)
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{
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s_records[id].m_state |= s_state_failure;
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break;
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}
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else if (cmp.m_data[1])
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{
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if (u64 _id = rec_try_abort(cmp.m_data[1]))
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{
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if (cmpxchg16(ptr->m_data, cmp.m_data, id, m_list[i].m_old))
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{
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rec_unref(_id);
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break;
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}
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rec_unref(_id);
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}
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else
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{
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s_records[id].m_state |= s_state_failure;
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break;
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}
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}
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}
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}
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// Try to acknowledge transaction success
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auto [_, ok] = s_records[id].m_state.fetch_op([](u64& state)
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{
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if (state & s_state_failure)
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{
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return false;
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}
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state |= s_state_success;
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return true;
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});
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// Complete transaction on success, or cleanup on failure
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for (u32 i = 0; i < m_count; i++)
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{
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auto& item = m_list[i];
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atomic2 cmp;
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cmp.m_data[0] = item.m_old;
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cmp.m_data[1] = id;
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if (item.m_addr->load() == item.m_old && atomic_storage<s64>::load(item.m_addr->m_data[1]) == id)
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{
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// Restore old or set new
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cmpxchg16(item.m_addr->m_data, cmp.m_data, 0, ok ? item.m_new : item.m_old);
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}
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}
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rec_unref(id);
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return ok;
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}
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