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08d61163ea
* Replace `int` with `s32` as return type for syscalls. * Renamed `SC_Something.*` files with the proper lv2 name `sys_something.*`. * Moving away from the lv2, those functions and folders that doesn't correspond to lv2 functions. E.g. module functions from sys_io, sysPrxForUser, cellGcmSys. * Splitted some files (memory -> memory+mmapper) and merged other ones (event+event_flag ->event, spu+spu_thread -> spu), according to common sense, PSDevWiki docs, and checking firmware files. * Removed external functions from `SysCalls.h`. NOTE: What should we do about: cellGcmCallback? It's not a lv2 syscall but it appears on the sc_table and it is actually called in games. Is this some kind of hack?
121 lines
3.7 KiB
C++
121 lines
3.7 KiB
C++
#pragma once
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u32 LoadSpuImage(vfsStream& stream, u32& spu_ep);
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enum
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{
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SYS_SPU_THREAD_GROUP_JOIN_GROUP_EXIT = 0x0001,
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SYS_SPU_THREAD_GROUP_JOIN_ALL_THREADS_EXIT = 0x0002,
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SYS_SPU_THREAD_GROUP_JOIN_TERMINATED = 0x0004
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};
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enum
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{
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SYS_SPU_SEGMENT_TYPE_COPY = 0x0001,
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SYS_SPU_SEGMENT_TYPE_FILL = 0x0002,
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SYS_SPU_SEGMENT_TYPE_INFO = 0x0004,
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};
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struct sys_spu_thread_group_attribute
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{
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be_t<u32> name_len;
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be_t<u32> name_addr;
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be_t<int> type;
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/* struct {} option; */
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be_t<u32> ct; // memory container id
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};
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struct sys_spu_thread_attribute
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{
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be_t<u32> name_addr;
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be_t<u32> name_len;
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be_t<u32> option;
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};
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struct sys_spu_thread_argument
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{
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be_t<u64> arg1;
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be_t<u64> arg2;
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be_t<u64> arg3;
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be_t<u64> arg4;
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};
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struct sys_spu_image
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{
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be_t<u32> type;
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be_t<u32> entry_point;
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be_t<u32> segs_addr; //temporarily used as offset of LS image after elf loading
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be_t<int> nsegs;
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};
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struct sys_spu_segment
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{
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be_t<int> type;
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be_t<u32> ls_start;
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be_t<int> size;
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be_t<u64> src;
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};
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struct SpuGroupInfo
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{
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std::vector<u32> list;
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std::atomic<u32> lock;
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std::string m_name;
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int m_prio;
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int m_type;
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int m_ct;
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SpuGroupInfo(const std::string& name, u32 num, int prio, int type, u32 ct)
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: m_name(name)
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, m_prio(prio)
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, m_type(type)
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, m_ct(ct)
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, lock(0)
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{
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num = 256;
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list.resize(num);
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for (u32 i = 0; i < num; i++)
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{
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list[i] = 0;
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}
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}
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};
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// SysCalls
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s32 sys_spu_initialize(u32 max_usable_spu, u32 max_raw_spu);
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s32 sys_spu_image_open(mem_ptr_t<sys_spu_image> img, u32 path_addr);
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s32 sys_spu_thread_initialize(mem32_t thread, u32 group, u32 spu_num, mem_ptr_t<sys_spu_image> img, mem_ptr_t<sys_spu_thread_attribute> attr, mem_ptr_t<sys_spu_thread_argument> arg);
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s32 sys_spu_thread_set_argument(u32 id, mem_ptr_t<sys_spu_thread_argument> arg);
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s32 sys_spu_thread_group_destroy(u32 id);
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s32 sys_spu_thread_group_start(u32 id);
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s32 sys_spu_thread_group_suspend(u32 id);
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s32 sys_spu_thread_group_resume(u32 id);
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s32 sys_spu_thread_group_create(mem32_t id, u32 num, int prio, mem_ptr_t<sys_spu_thread_group_attribute> attr);
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s32 sys_spu_thread_create(mem32_t thread_id, mem32_t entry, u64 arg, int prio, u32 stacksize, u64 flags, u32 threadname_addr);
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s32 sys_spu_thread_group_join(u32 id, mem32_t cause, mem32_t status);
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s32 sys_spu_thread_group_connect_event(u32 id, u32 eq, u32 et);
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s32 sys_spu_thread_group_disconnect_event(u32 id, u32 et);
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s32 sys_spu_thread_group_connect_event_all_threads(u32 id, u32 eq, u64 req, u32 spup_addr);
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s32 sys_spu_thread_group_disconnect_event_all_threads(u32 id, u8 spup);
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s32 sys_spu_thread_write_ls(u32 id, u32 address, u64 value, u32 type);
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s32 sys_spu_thread_read_ls(u32 id, u32 address, mem64_t value, u32 type);
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s32 sys_spu_thread_write_spu_mb(u32 id, u32 value);
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s32 sys_spu_thread_set_spu_cfg(u32 id, u64 value);
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s32 sys_spu_thread_get_spu_cfg(u32 id, mem64_t value);
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s32 sys_spu_thread_write_snr(u32 id, u32 number, u32 value);
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s32 sys_spu_thread_connect_event(u32 id, u32 eq, u32 et, u8 spup);
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s32 sys_spu_thread_disconnect_event(u32 id, u32 event_type, u8 spup);
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s32 sys_spu_thread_bind_queue(u32 id, u32 spuq, u32 spuq_num);
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s32 sys_spu_thread_unbind_queue(u32 id, u32 spuq_num);
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s32 sys_spu_thread_get_exit_status(u32 id, mem32_t status);
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s32 sys_raw_spu_create(mem32_t id, u32 attr_addr);
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s32 sys_raw_spu_destroy(u32 id);
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s32 sys_raw_spu_create_interrupt_tag(u32 id, u32 class_id, u32 hwthread, mem32_t intrtag);
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s32 sys_raw_spu_set_int_mask(u32 id, u32 class_id, u64 mask);
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s32 sys_raw_spu_get_int_mask(u32 id, u32 class_id, mem64_t mask);
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s32 sys_raw_spu_set_int_stat(u32 id, u32 class_id, u64 stat);
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s32 sys_raw_spu_get_int_stat(u32 id, u32 class_id, mem64_t stat);
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s32 sys_raw_spu_read_puint_mb(u32 id, mem32_t value);
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s32 sys_raw_spu_set_spu_cfg(u32 id, u32 value);
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s32 sys_raw_spu_get_spu_cfg(u32 id, mem32_t value);
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