Commit graph

618 commits

Author SHA1 Message Date
Eladash ee1384341e rsx: Implement atomic vertex upload (with Strict Rendering Mode) 2022-09-01 20:09:28 +03:00
Eladash fb01ed55e5 SPU: Fix potential deadlock in event queue syscalls 2022-09-01 19:03:38 +03:00
Eladash 3f02935844 Add some debugging information 2022-08-30 08:57:33 +02:00
Nekotekina e28707055b Implement simd_builder for x86
ASMJIT-based tool for building vectorized loops (such as ones in BufferUtils.cpp)
2022-08-28 18:38:52 +03:00
Eladash a71bdc761e SPU/Debugger: Improve debugging reservations
Simplify and make the debugging results more consistent.
2022-08-22 18:24:26 +03:00
Eladash 9d8f4d5cfa Bugfix after #12523 2022-08-22 18:24:26 +03:00
Eladash ee87fdc869 Fix GETLLAR spin detection 2022-08-22 08:33:22 +03:00
Eladash bf63a18c5f SPU Add ability to specify percentage of busy waiting 2022-08-21 15:02:01 +03:00
Eladash b0e2c959eb SPU: Disable notification if no changes were made in PUTLLC 2022-08-21 15:02:01 +03:00
Eladash 28bec8e1bf SPU: Implement custom reservation condition in atomic wait 2022-08-21 15:02:01 +03:00
Eladash 82b1a2bd7a SPU: add the concept of inaccurate reservations
Implement cellSpursRequestIdleSpu
2022-08-21 15:02:01 +03:00
Eladash c0e3b86064 SPU: Optimize spu_thread::get_events() 2022-08-21 15:02:01 +03:00
Eladash 6210a8491f SPU: Optimize and enable SPU GETLLAR Polling detection by default
* Make this setting guard all reservation waitings. (renamed)
* Revert atomic list usage: it's more expensive and not needed because it has a timeout and is not optimized for the rest of the waitables.
2022-08-21 15:02:01 +03:00
Eladash 33a4f05ffa SPU: Interleave loads/stores in reservation access utilities 2022-08-21 15:02:01 +03:00
Eladash a3007e11ca SPU: Fix minor race in sys_spu_thread_receive_event
Check final cpu_state::state value for suspend state because that's the variable the thread waits on.
2022-08-12 15:20:48 +03:00
Eladash 34bae90820 LV2: Move nearly all notifications out of all mutex scopes including IDM 2022-08-07 20:23:54 +03:00
Eladash 73aaff1b29 LV2: allocation-free synchronization syscalls
* Show waiters' ID in kernel explorer.
* Remove deque dependency from sys_sync.h
2022-08-07 20:23:54 +03:00
Eladash c7fbc16357 SPU: Postpone notifications to afterward group mutex ownership 2022-08-07 20:23:54 +03:00
Eladash 2eebbd307d LV2: Minor optimization regarding signal flag 2022-08-07 20:23:54 +03:00
sguo35 27acebc5f5 spu: use portable llvm recompiler on arm64
Since there is not yet an arm64 version of the assembly (fast) version.
2022-07-15 12:37:33 +03:00
Eladash 3e51426379 Savestates/SPU: Kill emulation when its safe to save SPU state 2022-07-15 09:30:53 +03:00
Eladash cdd6840826 Savestates/SPU: Complete fix for saving sys_spu_thread_receive_event 2022-07-12 15:15:42 +03:00
Eladash befd7ceb89 Savestates/sys_spu: Minor fix in saving sys_spu_thread_receive_event 2022-07-10 14:19:59 +03:00
Eladash 2cead6f328 Savestates/SPU: Fix saving sys_spu_thread_send_event 2022-07-10 14:19:59 +03:00
Eladash 87cd65ff03 Savestates: support game collections 2022-07-10 14:19:59 +03:00
Eladash 4ac88fa8d3 Savestates/RSX: Save drawing context 2022-07-08 12:57:43 +03:00
Eladash 5f8f9e33f1 RSX/Savestates: Replace GCM hack with a proper fix 2022-07-08 12:57:43 +03:00
Eladash 155bd09fd0 Savestates: Cleanup v128 usage
It's compatible with bitwise serialization so it is faster to load/save it this way.
2022-07-06 19:43:25 +03:00
Eladash 2815aecd0c Savestates: Save SPU decrementer state 2022-07-06 19:43:25 +03:00
Elad Ashkenazi fcd297ffb2
Savestates Support For PS3 Emulation (#10478) 2022-07-04 16:02:17 +03:00
Eladash cf0fcf5a2a SPU: Implement execution wake-up delay 2022-06-28 19:54:25 +03:00
Eladash 5e01ffdfd8 Debugger: Optimize cpu_thread::dump_regs()
Reuse string buffer. Copies and reallocations are expensive with such large strings.
2022-06-23 22:41:32 +02:00
Nekotekina 653a9e6e7f Debugger: always print cpu_thread::dump_misc()
Was removed for some reason.
2022-06-22 18:53:29 +03:00
Eladash ccb2724fc4 Debugger: Implement SPU breakpoints 2022-06-21 16:59:45 +03:00
Eladash d0e9108800 SPU: Implement "double" SNR storage 2022-06-20 20:50:11 +03:00
Jeff Guo cefc37a553
PPU LLVM arm64+macOS port (#12115)
* BufferUtils: use naive function pointer on Apple arm64

Use naive function pointer on Apple arm64 because ASLR breaks asmjit.
See BufferUtils.cpp comment for explanation on why this happens and how
to fix if you want to use asmjit.

* build-macos: fix source maps for Mac

Tell Qt not to strip debug symbols when we're in debug or relwithdebinfo
modes.

* LLVM PPU: fix aarch64 on macOS

Force MachO on macOS to fix LLVM being unable to patch relocations
during codegen. Adds Aarch64 NEON intrinsics for x86 intrinsics used by
PPUTranslator/Recompiler.

* virtual memory: use 16k pages on aarch64 macOS

Temporary hack to get things working by using 16k pages instead of 4k
pages in VM emulation.

* PPU/SPU: fix NEON intrinsics and compilation for arm64 macOS

Fixes some intrinsics usage and patches usages of asmjit to properly
emit absolute jmps so ASLR doesn't cause out of bounds rel jumps. Also
patches the SPU recompiler to properly work on arm64 by telling LLVM to
target arm64.

* virtual memory: fix W^X toggles on macOS aarch64

Fixes W^X on macOS aarch64 by setting all JIT mmap'd regions to default
to RW mode. For both SPU and PPU execution threads, when initialization
finishes we toggle to RX mode. This exploits Apple's per-thread setting
for RW/RX to let us be technically compliant with the OS's W^X
    enforcement while not needing to actually separate the memory
    allocated for code/data.

* PPU: implement aarch64 specific functions

Implements ppu_gateway for arm64 and patches LLVM initialization to use
the correct triple. Adds some fixes for macOS W^X JIT restrictions when
entering/exiting JITed code.

* PPU: Mark rpcs3 calls as non-tail

Strictly speaking, rpcs3 JIT -> C++ calls are not tail calls. If you
call a function inside e.g. an L2 syscall, it will clobber LR on arm64
and subtly break returns in emulated code. Only JIT -> JIT "calls"
should be tail.

* macOS/arm64: compatibility fixes

* vm: patch virtual memory for arm64 macOS

Tag mmap calls with MAP_JIT to allow W^X on macOS. Fix mmap calls to
existing mmap'd addresses that were tagged with MAP_JIT on macOS. Fix
memory unmapping on 16K page machines with a hack to mark "unmapped"
pages as RW.

* PPU: remove wrong comment

* PPU: fix a merge regression

* vm: remove 16k page hacks

* PPU: formatting fixes

* PPU: fix arm64 null function assembly

* ppu: clean up arch-specific instructions
2022-06-14 15:28:38 +03:00
Elad Ashkenazi 9bb7e8d614
rsx: Implement atomic FIFO fetching (stability improvement) (non-default setting) (#12107) 2022-06-04 15:35:06 +03:00
Eladash e7ced1aeab Debugger: Implement SPU mailbox content display 2022-05-25 17:36:28 +03:00
Eladash 961d41d0bd RawSPU: Reinvoke pending interrupts if missed 2022-05-25 11:46:51 +03:00
Eladash 2ba437b6dc SPU: Implement timer freezing ability 2022-05-14 22:03:47 +03:00
Eladash d77c9139ad Debugger: Show constant-formed attribute of register value 2022-05-10 22:34:29 +03:00
Eladash be5f8413ca
Avoid using PUTLLC in PUTLLUC if we know SPU LR has already been raised (#11940) 2022-05-05 22:15:08 +03:00
Nekotekina 10b33d0f79 SPU: optimize conflicting PUTLLUC (No-TSX)
Enable previously TSX-only optimization.
2022-05-05 19:16:16 +03:00
Eladash fcbeb2fa22 Remove slow vm::writer_lock usage from SPUThread.cpp 2022-05-04 23:36:57 +03:00
Eladash 3dda72e47f SPU: Cache reservation memory direct access handle (optimization) 2022-05-04 20:28:55 +03:00
RipleyTom a4d715e25d Warning Fixes 2022-03-23 19:35:10 +01:00
Nekotekina 14951d8713 Fix abuse of fs::pending_file
Debug dumps don't fall into category which needs atomic rewrite.
2022-01-24 22:39:01 +03:00
Nekotekina 12c83b340d Remove built_function
With today's branch prediction techniques, it's hardly useful.
2022-01-24 22:21:41 +03:00
Nekotekina 580bd2b25e Initial Linux Aarch64 support
* Update asmjit dependency (aarch64 branch)
* Disable USE_DISCORD_RPC by default
* Dump some JIT objects in rpcs3 cache dir
* Add SIGILL handler for all platforms
* Fix resetting zeroing denormals in thread pool
* Refactor most v128:: utils into global gv_** functions
* Refactor PPU interpreter (incomplete), remove "precise"
* - Instruction specializations with multiple accuracy flags
* - Adjust calling convention for speed
* - Removed precise/fast setting, replaced with static
* - Started refactoring interpreters for building at runtime JIT
*   (I got tired of poor compiler optimizations)
* - Expose some accuracy settings (SAT, NJ, VNAN, FPCC)
* - Add exec_bytes PPU thread variable (akin to cycle count)
* PPU LLVM: fix VCTUXS+VCTSXS instruction NaN results
* SPU interpreter: remove "precise" for now (extremely non-portable)
* - As with PPU, settings changed to static/dynamic for interpreters.
* - Precise options will be implemented later
* Fix termination after fatal error dialog
2022-01-15 06:48:04 +03:00
Malcolm Jestadt 31a5a77ae5 SPU: Use REP MOVSB in do_dma_transfer
- Try to use REP MOVSB when the size of the transfer is above a certain threshold
- This threshold is determined by the ERMS and FSRM cpuid flags
- The threshold values are (roughly) taken from GLIBC
- A threshold of 0xFFFFFFFF indicates that the cpu has neither flag
2022-01-02 21:35:46 +03:00