- Do not write to the texture until previous draw call is completed using it.
- This is usually not much of a problem until blending operations come into play.
* Implement caret upwards and downwards move in overlay_edit_text
* Optimize caret up and down movement
Co-authored-by: Megamouse <studienricky89@googlemail.com>
- This option was always enabled for NVIDIA cards, but it seems some games would benefit from the option on other GPUs as well.
- TODO: Hwtest to verify correct behavior and plan how to safely implement in hw
- The bytes in these values are based on the format according to hw tests
- G8B8 is unaffected as the first two bytes are already G8B8 for A8R8G8B8 standard layout (BGRA)
- A8B8G8R8 and its derivatives have words 0 and 2 exchanged.
SRC coordinates
- When extracting a 1x1 texture from another texture of a different
format, width conversion can result in a dimension of 0 if the
extracted texel is not a full texel in SRC
- Avoids double expansion when both the exp_tex flag is set AND the texture also is sampled as signed
- Should fix missing eyeballs in Mass Effect 1 with the previous sign expansion fix
- Already partially supported via EXP option in the shader opcode, but format decoding was disabled.
- Noticed in some UE3 games which use _SNORM variants on PC but _UNORM on rpcs3
- On multithreaded mesa, the program initialization routine was not
being flushed correctly. Set up synchronization fence after initialization
is complete.
- SRC0, SRC1 and SRC2 have different bits for precision modifiers all stored inside SRC1
- This explains the strange observed behavior of the MAD instruction which has 3 inputs
- Sometimes, usually with shaders that do pack/unpack operations, there is a write-to-self operation.
For example r0.xy = r0.xy
Obviously no new data was introduced into "r0" by this, so we should not mark the register as having new data.
- TODO: Investigate on realhw if self-reference is needed to "cast" the overlapping half registers to their full register counterparts.
- Do not allocate too many objects. This is a problem in games using dynamic memory allocators that can make it rare for a surface to fall on the same address twice, keeping zombie RTVs and DSVs alive much longer than needed.
- Current limit used is 256M of virtual VRAM which is impossible on retail PS3
- Those strange offsets noted in some games seem to match to subpixel addressing.
For example, when scaling down by a factor of 4, a pixel offset of 2 will end up inside pixel 0 of the output
- Partial stencil buffer clears were not implemented. This is for example where a game can choose to clear only some bits from the stencil buffer.
- Vulkan does not support masked stencil clears natively, it has to be implemented as a graphics operation.
- Also refactors vulkan overlay passes to use global resource system instead of forcing the render backend to own all of them and manage lifetimes.
It works fine on Mesa iris
Fixes detection of Mesa as recent Mesa does not have "x.org" on vendor string, allowing vendor_MESA to become true instead of vendor_INTEL on Mesa Intel
