RPCSX/rpcsx
1
0
Fork 0
mirror of https://github.com/RPCSX/rpcsx.git synced 2026-02-09 09:15:55 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity
8102 commits 5 branches 1 tag 150 MiB
Commit graph

1950 commits

Author SHA1 Message Date
Nekotekina ea554ae828 Implement 'Max SPURS Threads' option (hack) 
Pauses SPURS threads beyond limit automatically if set.
 2019-05-14 22:15:04 +03:00
Nekotekina 1eed421774 SPU LLVM: use branch patchpoints again 
Renewed and adapted for PIC and all branch types.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina 2f6707d0a0 SPU LLVM: regain some efficiency 
Avoid returns from the recompiler gateway, favoring tail calls.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina f33b81545e SPU: implement recompiler gateway function in assembly 
Use GHC calling convention directly for SPU object entry points.
This may address performance degradation after #5923.
 2019-05-14 22:15:04 +03:00
Nekotekina a74fd27e3d SPU LLVM: fix SPU termination (spu_escape) on Windows 
Adjust restored stack pointer for the lack of tail call.
 2019-05-14 22:15:04 +03:00
Nekotekina cc8c635855 SPU: PIC support preview 
SPU ASMJIT not supported yet.
Giga mode not supported properly.
 2019-05-14 22:15:04 +03:00
scribam 6c5ea068c9 Remove redundant semicolons 
Fix "-Wextra-semi" warnings
 2019-05-12 18:32:11 +03:00
Rui Pinheiro 1f82a26a9c SPU LLVM: Fix Mega 2019-05-12 00:39:42 +03:00
Nekotekina 8194c92f1c SPU LLVM: disable GHC CC for chunks on Windows 
Causes fatal error inside LLVM.
 2019-05-11 02:35:16 +03:00
Nekotekina 5d33d9a3d9 Enable most warnings in GCC 2019-05-11 02:13:19 +03:00
Nekotekina 7492f335e9 SPU analyser: basic function detection in Giga mode 
Misc: fix EH frame registration (LLVM, non-Windows).
Misc: constant-folding bitcast (cpu_translator).
Misc: add syntax for LLVM arrays (cpu_translator).
Misc: use function names for proper linkage (SPU LLVM).

Changed function search and verification in Giga mode.
Basic stack frame layout analysis.
Function detection in Giga mode.
Basic use of new information in SPU LLVM.
Fixed jump table compilation in SPU LLVM.
Disable broken optimization in Accurate xfloat mode.
Make compiled SPU modules position-independent in SPU LLVM.

Optimizations include but not limited to:
 * Compiling SPU functions as native functions when eligible
 * Avoiding register context write-out
 * Aligned stack assumption (CWD alike instruction)
 2019-05-11 02:13:19 +03:00
eladash 13d8e33d9a Return ESRCH if ppu thread ID was not found in sys_cond_signal_to 2019-05-07 08:58:07 +03:00
eladash 4e2650af91 Fix sys_rwlock_wlock timedout event 
If the rwlock is currently acquired by a writer signaling readers is wrong and will lead to EPERM for wunlock!
Only signal blocked readers if the rwlock is currently acquired by readers
 2019-05-07 08:58:07 +03:00
eladash ca08418dc1 Fix sys_rwlock_runlock on waiting readers 
readers can wait on the sleep queue if a writer lock has been blocked before it, in this case after runlock: writer should acquire the lock but the r's sleep queue is still not empty!
 2019-05-07 08:58:07 +03:00
Megamouse c1e245ae73 Emu: msg_dialog_frame fixup: don't reject on Close to prevent Emu.Stop() 2019-05-05 16:29:50 +02:00
Megamouse b639584acc Emu/Qt: Fix Boot Recent when using BootGame(add_only=true) 2019-05-05 16:29:50 +02:00
Megamouse b0a24665e5 Emu: msg_dialog_frame fixes 2019-05-05 16:29:50 +02:00
Nekotekina a703460fc6 SPU ASMJIT: skip some unused analyser steps 
May improve performance
 2019-05-04 19:35:13 +03:00
Nekotekina ba1ec1d5d6 SPU analyser: remove use_ra from HBR 
Since this is a hint instruction, we don't really use reg value here.
 2019-05-04 18:33:58 +03:00
Nekotekina 45ce8db6cb SPU Analyser: fix reg origin regression 
Propagate phi instead of claiming new values
 2019-05-04 18:29:47 +03:00
Nekotekina 4bd022f778 SPU analyser: minor logic fix and cleanup 
Don't fill any chunk info for now (design mistake).
 2019-05-03 14:18:22 +03:00
Nekotekina 6c34d7104e SPU analyser: fix excessive workload list size 
Typo grade; regression
 2019-05-02 23:29:02 +03:00
Nekotekina 54dc617f39 SPU analyser: internal spu_itype optimization 
Use only 1 byte for instruction type.
Flags are transformed into range comparisons.
 2019-05-02 19:32:09 +03:00
Nekotekina 15bd3b8724 SPU: fix minor UB in STQD/LQD instructions 2019-05-02 18:00:49 +03:00
Nekotekina 2b4da18709 SPU LLVM: fix xfloat regression 
It was an old bug with possible hidden use of deleted instructions.
 2019-05-02 13:39:43 +03:00
Nekotekina d48dc29e55 SPU LLVM: fix perf regression 
Bug in the analyser was created recently in #5882.
 2019-05-02 13:39:43 +03:00
Nekotekina 69d2ea35b9 SPU: minor analyser cleanup 2019-05-02 13:39:43 +03:00
Nekotekina a4c4ee9cb2 SPU: fix excessive cache size regression 2019-05-02 13:39:43 +03:00
Nekotekina 1bc5e27507 SPU LLVM: move reg origin search to analyser 
Refactor SPU analyser (block_info struct).
Fill register use info (currently unused).
 2019-05-01 00:37:15 +03:00
Nekotekina 1294e0d189 SPU LLVM: improve codegen in loops 
Use a trick in check_state to improve LICM pass.
 2019-05-01 00:37:15 +03:00
Nekotekina e09c6ea4b4 SPU analyser: add spu_iflag 
Register information about register accesses.
 2019-04-30 14:33:27 +03:00
Nekotekina 716737ecf2 LLVM DSL: expression matching (alpha) 
Implement remaining instructions.
Implement match_expr method.
Implement helper methods.
 2019-04-30 14:33:27 +03:00
eladash 3bd29b8bac Fix Unregistered HLE function access 2019-04-29 23:04:16 +03:00
eladash ea1c9a2e17 Fix PPU Breakpoints and ppu_check_toc 2019-04-29 23:04:16 +03:00
Nekotekina 2ade3c594c LLVM DSL: expression matching (preview 2) 
Implement more instructions.
 2019-04-25 03:33:18 +03:00
Nekotekina 8754bbd444 SPU LLVM: add match_vr<> template 
Returns reg value only if type is compatible, avoiding bitcast.
 2019-04-24 23:55:41 +03:00
Nekotekina dd9bd1338b SPU LLVM: add get_vrs<> template 2019-04-24 23:55:41 +03:00
Nekotekina 3e0b45719d LLVM DSL: rewrite zshuffle, shuffle2, build 
Add llvm_const_vector template.
 2019-04-24 23:55:41 +03:00
Nekotekina b02503963e LLVM DSL: rewrite splat, fsplat, vsplat 
Add llvm_const_float and llvm_splat templates.
 2019-04-24 23:55:41 +03:00
Nekotekina c83e65f29e LLVM DSL: rewrite extract and insert 2019-04-24 23:55:41 +03:00
Nekotekina b7b93eae13 SPU LLVM: minor bitcast cleanup 
Remove redundant explicit constand propagation in some instructions.
 2019-04-24 23:55:41 +03:00
Nekotekina ac473eb400 Rewrite cpu_translator::rol, add fshl and fshr 
Use new funnel shift intrinsics
 2019-04-24 23:55:41 +03:00
Nekotekina 42448cf3e5 Remove cpu_translator::scarry, cpu_translator::merge 2019-04-24 23:55:41 +03:00
Nekotekina 524aac75ed LLVM DSL: rewrite bitcast, zext, sext, trunc, select, min, max ops 
Are made composable in expressions similar to arithmetic ops.
Implement noncast in addition to bitcast (no-op case).
Implement bitcast constant folding.
Fixed some misuse of sext<>.
 2019-04-24 23:55:41 +03:00
Nekotekina dc9118ef50 LLVM DSL refactoring 
Properly forward value categories in expression structs.
Simplify SFINAE tests (is_llvm_expr, llvm_common_t) in global operators.
Add llvm_const_int and remove llvm_add_const, llvm_sub_const, etc.
Add llvm_ord and llvm_uno for FP comparison via >=< operators.
Replace cpu_translator::fcmp with fcmp_ord and fcmp_uno.
 2019-04-24 23:55:41 +03:00
Ani a24ede4f40 cellPad: Update vendor and product IDs 
- Used IDs were not from the Guitar Hero instruments but in fact from the Rock Band ones. Sets the correct Guitar Hero IDs and adds the Rock Band ones on comments. TODO: Allow selecting the specific devices on the PAD Settings.
- Adds DJ Hero Turntable VID/PID.
- Adds Dance Dance Revolution Mat VID/PID.
 2019-04-20 23:17:13 +01:00
eladash 3a5f4ed757 Print SPU Group ID on the debugger 2019-04-20 20:43:58 +01:00
eladash 450e2c9a0e cellSaveData: Add missing SDK version check for setParam->reserved2 check 2019-04-20 20:43:58 +01:00
eladash ae5a4b697e Fix cellSaveDataListAutoSave/Load unk flags 2019-04-20 01:04:41 +03:00
eladash 1e9d3346d1 Reschedule in cellMsgDialogOpen2 2019-04-20 01:04:41 +03:00