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32 commits

Author SHA1 Message Date
Eladash 59ed222205 Disasm: read instruction contents only once 
Memory is volatile and may be changed by guest threads, ensure the decoded instruction matches with the data.
 2020-12-21 13:46:26 +03:00
Eladash ef884642e4 Cleanup disasm classes a bit 2020-12-21 13:46:26 +03:00
Eladash bfe1a8673a PPU: Allow HLE execution from pure instruction decoder type interpreter 2020-12-15 11:18:51 +03:00
Nekotekina 65c04e4ddd Remove constexpr from ppu/spu decoders. 
We don't need them at compile time (yet).
But can reduce compile time and complexity.
 2020-12-10 15:06:01 +03:00
Nekotekina b382d3b3e9 Remove ASSUME macro 
It's dangerous and sometimes bluntly misused feature.
Its optimization potential is near-zero.
 2020-12-10 14:08:02 +03:00
RipleyTom af8c661a64 Remove BOM markers 2020-12-06 15:30:12 +03:00
Eladash 6590366f8e PPU Debugger: fix typo in STDX 2020-10-17 22:00:22 +03:00
Eladash fa0b02ed30 PPU Debugger: Improve move from/to CR registers instructions 2020-10-17 22:00:22 +03:00
Eladash c5aebe4564 Debugger: Implement PPU SLWI, SRWI, SLDI mnemonics 2020-08-24 02:10:51 +03:00
Eladash 81749f4353 SPU/PPU disasm: replace unknown instructions message with question marks 2020-05-22 17:37:22 +03:00
Nekotekina 1ceb779a38 Make ppu_decoder<> objects constexpr (partial) 2020-03-24 13:46:46 +03:00
Eladash 74c05ec5ee PPU Disasm: Fix non-link extended BCCTR forms 2020-03-14 19:26:22 +02:00
Eladash 83a2204f87 PPU Disasm: Fixup BCCTR after #7775 2020-03-14 18:30:14 +02:00
Eladash ff341fe597 PPU Disasm: Fix branches spacing 
Null terminator was added at the end which prevented proper spacing.
 2020-03-14 16:12:18 +03:00
Eladash 3efd5f360c PPU DisAsm: Again 2019-12-15 19:55:23 +03:00
Nekotekina ad9c9f0183 C-style cast cleanup II 2019-11-30 18:17:45 +03:00
Eladash 47c3d945aa spu/ppu-diasm: Fixup for #6772, #6722 2019-10-16 21:11:29 +03:00
Eladash 7e08fff91d ppu disasm: Improve CR bits manipulation instructions formatting 2019-10-14 20:44:23 +03:00
Eladash 3910b2465e Fix unknown BCLR forms formatting 2019-10-14 20:44:23 +03:00
Eladash 1e303e9f97 ppu disasm: Implement BCLR's, BCCTR's and BC's extended mnemonics 
Also:
BCCTR cr bit is now shown as cr(bit/4)[bit % 4]
BLRL is now shown properly
BDN?Z[TF](LR?)L?A? branches are now implemented.
 2019-10-14 13:54:56 +01:00
Eladash 5978b1f28f ppu disasm: Fix AA BC formatting 2019-10-14 13:54:56 +01:00
Eladash 718491c56d ppu disasm: Improve BC formatting 2019-09-23 02:35:56 +03:00
Eladash 2c47e39f08 ppu disasm: Improve disassembly of BCTR and LWSYNC 2019-09-23 02:35:56 +03:00
Eladash 829047ecdb ppu disasm: Improve ORI and ORIS disassembly 2019-07-29 18:28:39 +03:00
TGEnigma 6baf675205 Fixes PPU disasm for branch opcodes 2018-04-16 19:02:06 +04:00
elad335 3aefd14b3d disasm: display db[x]cyc 2017-12-10 16:19:36 +04:00
Nekotekina 7428bb3025 HLE linkage rewritten 2017-04-16 17:44:19 +03:00
Nekotekina fb9b09d004 PPU disasm: print HLE index 2017-04-08 23:51:54 +03:00
Nekotekina 3bfe17a14f PPU: HACK instruction removed 
Breakpoints fixed
 2017-03-22 23:23:47 +03:00
Nekotekina f4b95c0226 PPU analyser improved 2017-02-12 21:12:08 +03:00
Nekotekina e2d82394f6 Cell 2016-05-23 16:22:23 +03:00
Nekotekina c4e99dbdb2 Partial commit: Cell 2016-04-15 19:22:34 +03:00