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10971 commits 5 branches 1 tag 150 MiB
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432 commits

Author SHA1 Message Date
Eladash 56cebd99c2
SPU: Simplify logging of MFC commands (#9004) 2020-10-01 19:52:39 +03:00
Eladash f4ca6f02a1 PPU: Implement support for 128-byte reservations coherency 2020-09-28 22:34:42 +03:00
Eladash 09cddc84be SPU/PPU: Implement Atomic Cache Line Stores 2020-09-27 20:09:21 +03:00
Eladash bfa78870cb SPU: Fix unregistered channels in RCHCNT 
Shouldn't throw exception on realhw.
 2020-09-22 19:47:47 +03:00
Eladash ad37259ccc SPU: Implement many missing channel counts 2020-09-22 19:47:47 +03:00
Eladash c436ef0c6f
SPU: Implement channels 70, 71, add naming for channel 69 (#8932) 2020-09-19 13:08:35 +01:00
eladash 36ac68b436 SPU: Implement events channel count, minor interrupts fixes 2020-09-18 21:57:24 +03:00
Eladash 3206378ae6 sys_spu: Fix overexecution of cpu_return() 2020-09-12 22:11:40 +03:00
Eladash 7ce790f369 SPU: Use ASM for AVX2 coompilation instead of intrinsics 2020-09-12 18:49:49 +03:00
Eladash 9ff0b460a2 SPU: Make PUTLLUC LR event accurate 2020-09-11 09:02:18 +02:00
Eladash 4f0125a0e9 SPU: Remove "Accurate PUTLLUC" setting (always accurate) 2020-09-11 09:02:18 +02:00
Eladash 1e4655aef6
SPU: Remove STOP 0x0 hack (#8873) 2020-09-09 11:36:04 +01:00
Eladash 5060c779da
SPU: Use unaligned instructions in mov_rdata_avx (MSVC) (#8851) 2020-09-07 21:32:44 +01:00
Eladash abc715bc5c
SPU: Make PUT transfers use SEQ-CST ordering on Accurate DMA (#8844) 2020-09-06 12:09:14 +01:00
Eladash 2688081656 SPU: Use unaligned AVX instructions for cmp_data_avx 2020-09-06 07:51:12 +03:00
Eladash e4abd3dc5a SPU: Do not ignore pending PUT tranfers just becase GET may not be cache-line atomic 
This is not the proper way to emulate non-atomic GET tranfers, as it makes it seems as if PUT atomic tranfers arent atomic. (TODO)
Incomplete GET cache line accesses still do not verify data though.
 2020-09-05 22:23:55 +03:00
Eladash c7a185d4e7 SPU: Fix not acuiring reservation locks on DMA with more than one cache line (Accurate DMA) 2020-09-05 22:23:55 +03:00
Eladash 4ffc58a8ce SPU: Cleanup for Accurate PUTLLUC 
Should no longer affect GET commands because Accurate DMA is available for this functionality.
 2020-09-04 10:20:44 +02:00
Eladash c5c9ea1b21 SPU: Make GET's full and aligned cache line accesses atomic with Accurate DMA 2020-09-04 10:20:44 +02:00
Eladash 73d23eb6e6
SPU: Implement Accurate DMA (#8822) 2020-09-02 23:58:29 +02:00
Nekotekina ebc4a0188a Restore some code 2020-08-28 01:54:39 +03:00
Eladash 47b545282e
SPU: Fix events ACK, minor optimizations (#8771) 2020-08-27 21:36:54 +01:00
Eladash 841b8fad38 SPU: Fix timer events 2020-08-24 01:57:32 +03:00
Eladash 0f8ca1f7c5
SPU: Implement RSX accurate reservations on TSX (#8721) 2020-08-13 00:00:37 +01:00
Eladash e52dd9dc6f
SPU: Implement SYS_SPU_THREAD_OPTION_DEC_SYNC_TB_ENABLE (#8657) 2020-07-30 14:01:25 +01:00
Eladash 82068cf802
SPU: Fix spu_thread::cpu_stop() missed executions (#8656) 2020-07-30 10:07:18 +01:00
Eladash a029a94c73 SPU: Use waitable atomics for SPU channels interface 2020-07-23 13:45:58 +03:00
Eladash f8d2d8ca11 SPU/Windows: Fix LS memory mirrors 
This is a workaround but this is because of how utils::shm works on Windows path.
 2020-07-19 17:58:49 +03:00
Eladash c37bc3c55c SPU: Make spu_thread::offset private 2020-07-19 17:58:49 +03:00
Eladash af1ceb1151 SPU LLVM: LS Memory Mirrors (Optimize loads/stores) 2020-07-18 02:01:33 +03:00
Eladash 235d12aa6b SPU MFC: Never clear tag status in WrTagUpdate 2020-07-10 02:52:02 +03:00
Eladash 5d1fc546a8 SPU MFC: Fix MFC_WrTagUpdate channel count 
Always report available, in realhw this is just a hint if the previous tag update hasnt been checked yet by the MFC, avoiding blocking writes and allowing the SPU to execute some code while it processes the previous update request.
Except for MFC_TAG_UPDATE_IMMEDIATE, where it also waits for MFC to process it.
 2020-07-10 02:52:02 +03:00
Eladash 84470c34db SPU: Disable PUTLLC NOP transfers detection on TSX path 2020-07-09 03:17:35 +01:00
Eladash f8dbfa1d1e SPU: Implement GETLLAR polling detection 2020-07-09 03:17:35 +01:00
Eladash dc25a3fa2a PPU debugger: Show stack address of each function 2020-07-06 18:58:16 +02:00
Eladash 2c93fecd8b SPU: Use named constants for MFC tag updates 2020-06-27 20:42:41 +01:00
Eladash f29589e5cf SPU debugger: Add atomic status and tag update channels information 2020-06-27 07:04:37 +01:00
Eladash 731d4330fe
v128: A few optimizations (#8432) 2020-06-15 17:24:04 +03:00
Eladash 5777a1d426 SPU: Implement EBUSY error on non-empty mailbox (sys_spu_thread_send_event/sys_event_flag_set_bit) 
Write into inbound mailbox under mutex.
 2020-06-15 17:08:57 +03:00
Eladash c15b5f1eca SPU: Move check_state() outside of mutex scope 
Can result in a deadlock in some cases, cpu flags are checked after this function as well anyways.
 2020-06-15 17:08:57 +03:00
sampletext32 437f374bae Fix some checks 2020-06-04 19:48:08 +03:00
Nekotekina abf9a08ee3 Fix warnings 2020-05-27 18:41:17 +03:00
Eladash 7c3166a0c6 SPU MFC: Fix MFC_WrListStallAck on interpreters 2020-05-20 22:55:30 +03:00
Eladash 4405f46aec SPU MFC: Fix SN interrupts 2020-05-20 22:55:30 +03:00
Eladash 81684919f5 SPU MFC: Implement MFC_SDCRZ_CMD 2020-05-20 22:55:30 +03:00
Eladash a2653532ef SPU reservations (TSX): Remove wait flag in PUTQLLUC 2020-05-17 14:20:21 +03:00
Eladash 61f43d78df SPU: Minor cleanup of exception in stop_and_signal 2020-05-14 16:58:50 +01:00
Eladash 54dd9f4eae sys_spu: Fix sys_spu_thread_group_terminate vs sys_spu_thread_group_exit race on values 2020-05-14 16:58:50 +01:00
Eladash 9266507e4c SPU: Implement spu_channel_(4_)t::try_read 2020-05-13 19:36:44 +03:00
Eladash 7ff25588f4 sys_spu: Minor cleanup of group termination process 2020-05-13 19:36:44 +03:00