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3739 commits

Author SHA1 Message Date
Jan Beich 511ca82e30 cellAVdec: constify AVCodec for ffmpeg >= 5.0 
rpcs3/Emu/Cell/Modules/cellAdec.cpp:325:12: error: assigning to 'AVCodec *' from 'const AVCodec *' discards qualifiers
                        codec = avcodec_find_decoder(AV_CODEC_ID_ATRAC3P);
                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
rpcs3/Emu/Cell/Modules/cellAdec.cpp:331:12: error: assigning to 'AVCodec *' from 'const AVCodec *' discards qualifiers
                        codec = avcodec_find_decoder(AV_CODEC_ID_MP3);
                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
rpcs3/Emu/Cell/Modules/cellVdec.cpp:143:12: error: assigning to 'AVCodec *' from 'const AVCodec *' discards qualifiers
                        codec = avcodec_find_decoder(AV_CODEC_ID_MPEG2VIDEO);
                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
rpcs3/Emu/Cell/Modules/cellVdec.cpp:148:12: error: assigning to 'AVCodec *' from 'const AVCodec *' discards qualifiers
                        codec = avcodec_find_decoder(AV_CODEC_ID_H264);
                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
rpcs3/Emu/Cell/Modules/cellVdec.cpp:153:12: error: assigning to 'AVCodec *' from 'const AVCodec *' discards qualifiers
                        codec = avcodec_find_decoder(AV_CODEC_ID_MPEG4);
                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 2022-01-21 21:36:17 +03:00
Nekotekina 00274bb4da PPU: port FP convert instructions to Aarch64 2022-01-21 16:07:48 +03:00
Nekotekina a4d94a83b9 PPU/simd.hpp: minor changes in DP instructions 2022-01-21 13:57:46 +03:00
Nekotekina 0de9960772 PPU: rewrite MFOCRF+MFCR instructions 2022-01-21 12:49:52 +03:00
Nekotekina aa7c9dd15d PPU: rewrite LVSL/LVSR instructions 
Make the tables endian-agnostic.
 2022-01-21 00:05:40 +03:00
Nekotekina 17b1a34ebf PPU: rewrite LVLX/LVRX/STVLX/STVRX instructions 2022-01-20 21:16:00 +03:00
Nekotekina 349f251d14 PPU LLVM: use masked stores for STVLX/STVRX 
Drop maskmove intrinsic, not portable.
Its implicit NT hint may also hurt performance.
 2022-01-20 21:16:00 +03:00
Nekotekina 327c577024 PPU: print internal interpreter build error 2022-01-20 14:42:58 +03:00
Nekotekina b42fae0989 PPU: refactor shift and splat instructions 
Fix utils::rol32/64 functions.
Fix immediate clamping in splat instructions.
Other fixes.
 2022-01-19 23:01:31 +03:00
Nekotekina 4728478247 PPU: improve interpreter codegen 
Implement more sensible check for EVEX prefix and SSE
 2022-01-18 04:20:06 +03:00
Nekotekina 4704367382 Remove unnecessary asmjit::imm_ptr 2022-01-18 00:10:32 +03:00
Nekotekina 14cca55b50 PPU: refactor vector rounding instructions 
Fix: nearbyint -> roundeven
 2022-01-18 00:10:32 +03:00
Nekotekina 248f9424ac PPU: refactor VPack instructions 2022-01-18 00:10:19 +03:00
Nekotekina b404d37eb0 PPU: more interpreter refactoring (VPERM) 
Notably, runtime-built SSSE3 version of VPERM.
Some other instructions are refactored and vectorized.
Aarch64 impl of multiple instructions including VPERM.
 2022-01-18 00:10:19 +03:00
RipleyTom 58fdf58150 Force close socket in sys_net_bnet_close 2022-01-17 21:27:20 +01:00
Nekotekina 22240777aa PPU Interpreter: fix accuracy flag dispatch 2022-01-16 01:00:37 +03:00
Nekotekina f95395b351 PPU LLVM: improve accuracy of VSL/VSR 
Passes tests, should now be equal to interpreter.
 2022-01-15 21:13:31 +03:00
Nekotekina df24cff0b1 PPU LLVM: fix VMINFP and VMAXFP accuracy 
PPU cache needs to be cleared.
 2022-01-15 17:36:57 +03:00
Nekotekina 6dda047128 PPU LLVM: fix VNMSUBFP sign handling 
PPU cache needs to be cleared.
 2022-01-15 17:36:57 +03:00
Nekotekina e9efa73eed PPU: restore previous NJ mode handling option 
Fix the divergence between PPU Interpreter and LLVM.
 2022-01-15 17:36:57 +03:00
Nekotekina 580bd2b25e Initial Linux Aarch64 support 
* Update asmjit dependency (aarch64 branch)
* Disable USE_DISCORD_RPC by default
* Dump some JIT objects in rpcs3 cache dir
* Add SIGILL handler for all platforms
* Fix resetting zeroing denormals in thread pool
* Refactor most v128:: utils into global gv_** functions
* Refactor PPU interpreter (incomplete), remove "precise"
* - Instruction specializations with multiple accuracy flags
* - Adjust calling convention for speed
* - Removed precise/fast setting, replaced with static
* - Started refactoring interpreters for building at runtime JIT
*   (I got tired of poor compiler optimizations)
* - Expose some accuracy settings (SAT, NJ, VNAN, FPCC)
* - Add exec_bytes PPU thread variable (akin to cycle count)
* PPU LLVM: fix VCTUXS+VCTSXS instruction NaN results
* SPU interpreter: remove "precise" for now (extremely non-portable)
* - As with PPU, settings changed to static/dynamic for interpreters.
* - Precise options will be implemented later
* Fix termination after fatal error dialog
 2022-01-15 06:48:04 +03:00
Eladash a60cee6536 Update PPUTranslator::MTFSFI for its intention to be clearer 2022-01-12 03:37:39 +03:00
kd-11 d874ca5d8c cellGame: Fall back to VERSION field if APP_VER is missing from PARAM.SFO 2022-01-10 12:27:30 +03:00
Vestrel 1adc408ad7
More sys_uart packets (#11332) 
* Additional sys_uart packets added
 2022-01-10 03:43:54 +03:00
Vestral 9766d87126 cellAudio: fix enqueued samples computation 2022-01-07 09:48:51 +01:00
clienthax 350257e1a4 Fcntl 0xc0000007, 0xc0000015, 0xc000001c 2022-01-04 22:47:06 +03:00
Florin9doi 0e07d3c58f USB: Improve SingStar emulation 2022-01-04 18:03:23 +01:00
Malcolm Jestadt 31a5a77ae5 SPU: Use REP MOVSB in do_dma_transfer 
- Try to use REP MOVSB when the size of the transfer is above a certain threshold
- This threshold is determined by the ERMS and FSRM cpuid flags
- The threshold values are (roughly) taken from GLIBC
- A threshold of 0xFFFFFFFF indicates that the cpu has neither flag
 2022-01-02 21:35:46 +03:00
Megamouse 1c014299eb HLE: fix some types 2022-01-02 18:18:31 +03:00
Nekotekina cb2748ae08 Update ASMJIT (new upstream API) 2021-12-29 02:45:00 +03:00
clienthax 6837370a62 Handle SYS_NET_IPPROTO_IP get/setsockopt 
Improve net logging.

Should allow latest vsh to load (Depending on windows version apparantly..)
 2021-12-27 20:58:09 +03:00
Nekotekina d836033212 LLVM: enable some JIT events (Intel, Perf) 
Made some related adjustments.
Currently incomplete.
 2021-12-26 16:41:37 +03:00
Eladash 6ee9d0f35f sys_rsx: Outlaw mapping sys_vm memory to RSX IO address-space 2021-12-25 02:22:49 +03:00
Nekotekina dcd011048d Implement "built_function" utility (runtime-generated assembly) 
Similar to build_function_asm, but links without indirection.
Achieved by emitting code directly into a byte array.
 2021-12-22 19:27:20 +03:00
Nekotekina c0bafbc804 TSX: enable same data optimization for PUTLLC 2021-12-19 20:23:01 +03:00
Nekotekina 61c64d1060 TSX: refactoring M 
Remove first stage 'optimistic' transactions.
 2021-12-19 20:23:01 +03:00
Nekotekina 3e1e1a683c TSX/PPU: fix conditional store regression 2021-12-17 21:48:01 +03:00
Megamouse cc21d1b3cf cellSaveData: prevent some potential crashes due to corrupt files 2021-12-14 20:30:47 +01:00
Malcolm Jestadt 2f93df480b SPU LLVM: Disable affineqb shufb paths temporarilly 2021-12-10 19:32:10 +03:00
Megamouse 68466f05b6 cellAudio: move some stuff to cpp 2021-12-09 01:46:44 +01:00
Megamouse e6b4655142 cellAudio: use members instead of config values 2021-12-09 01:46:44 +01:00
Nekotekina 8abd3e8bb4 PPU LLVM: fix bitcast usage to enable constant folding 2021-12-07 15:35:51 +03:00
Megamouse a4ad0a9468 cellVideoOutConfigure: treat unknown aspect as AUTO 2021-12-06 20:50:57 +01:00
Malcolm Jestadt 0617e9e14b SPU LLVM: Fix vgf2p8affineqb usage 
- Reverse the order of the bytes in the selection masks. Previously it was assumed that byte 0 would determine the output of bit 0, but byte 7 determines the output of bit 0.
 2021-12-06 12:34:11 +03:00
Nekotekina e3e39e8de3 PPU LLVM: rewrite and optimize saturation bit 
Use vector accumulator
 2021-12-03 00:14:06 +03:00
Nekotekina 209b14fbac PPU LLVM: inline remaining vector instructions 2021-12-03 00:14:06 +03:00
Nekotekina 04c9d01390 PPU LLVM: modernize most vector instructions 
Rewritten VSUM instructions:
VSUMSWS, VSUM2SWS, VSUM4SBS, VSUM4SHS, VSUM4UBS
 2021-12-03 00:14:06 +03:00
Nekotekina c9d8e59dbf PPU LLVM: allow to drop setting SAT flag (optimization, module-wide) 
Implement ppu_attr::has_mfvscr (partially, module-wide search).
If this instruction isn't found, allow to drop setting SAT flag.
It's based on presumption that only MFVSCR can retrieve SAT flag.
 2021-12-03 00:14:06 +03:00
Nekotekina 86b194014b PPU LLVM: rewrite more packing instructions 
Rewritten VPKUHUM, VPKUHUS, VPKUWUM, VPKUWUS.
Decoupled saturation test from sat pack pattern.
 2021-12-03 00:14:06 +03:00
Nekotekina e7c827f73b PPU LLVM: rewrite some packing instructions 
Rewritten VPKSHSS, VPKSHUS, VPKSWSS, VPKSWUS.
Decoupled saturation test from sat pack pattern.
 2021-12-03 00:14:06 +03:00