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458 commits

Author SHA1 Message Date
Eladash b56bc7e087 SPU: cleanup channels logging 2020-10-23 13:13:04 +03:00
Nekotekina dc8252bb9f Remove XABORT in PPU/SPU transactions. 
It's expensive for unknown reason. Simply XEND is usually much cheaper.
Add some minor improvements. Use g_sudo_addr.
 2020-10-20 09:10:21 +03:00
Nekotekina 72d1ac22aa SPU: report too many PUTLLC attempts (TSX) 
Mirrored to PPU STCX code and PUTLLUC (STORE128).
 2020-10-19 19:41:28 +03:00
Nekotekina 8ce5392390 TSX: add prefetchw instruction in transaction code 2020-10-19 19:41:28 +03:00
Nekotekina 311682b341 SPU: fix GETLLAR regression 
Misplaced mov_rdata
 2020-10-19 19:41:28 +03:00
Nekotekina 120849c734 Implement perf stat counter for PPU/SPU reservation ops 
Adds Emu/perf_meter.hpp header file.
Uses RDTSC for speed.
Prints stats at exit.
 2020-10-19 19:41:28 +03:00
Nekotekina adf50b7c4b Implement cpu_thread::if_suspended 
Use it for opportunistic guaranteed GETLLAR execution (TSX-FA).
 2020-10-18 20:10:48 +03:00
Nekotekina f5c575961f Implement priorities for cpu_thread::suspend_all tasks 
Give PUTLLUC increased priority.
 2020-10-18 20:10:48 +03:00
Eladash 402e8b12a6 SPU: Touch unmapoed memory in reservation mismatch 2020-10-18 11:42:54 +03:00
Nekotekina d0057c92e4 Fix spu_putlluc_tx (insignificant) 2020-10-17 21:27:19 +03:00
Nekotekina 583ed61712 SPU: return some give-up behaviour for PUTLLC (TSX) 
Despite using concept of "shared" lock, allow only first to proceed.
This is similar how conditional stores for PPU are implemented.
 2020-10-16 12:14:42 +03:00
Nekotekina facde63460 PPU: fix ppu_stcx_accurate_tx 
Don't destroy xmm6/xmm7 state on exit.
Improve addr arg handling (simplify).
 2020-10-15 19:24:00 +03:00
Nekotekina 494953997e PPU/SPU: give up on conditional stores if locking fails 
Restores Non-TSX behaviour partially.
 2020-10-15 17:18:49 +03:00
Nekotekina 1b89ad00e7 SPU: restore some LR event setting logic after #9048 2020-10-15 17:18:49 +03:00
Nekotekina 3bddba0c7a SPU: fix spu_getllar_tx 
Was not executing.
 2020-10-14 02:53:29 +03:00
Nekotekina 97cd641da9 TSX: reimplement spu_getllar_tx 
Only used as a backup method of reading reservation data.
Increase long GETLLAR reporting threshold.
 2020-10-13 21:10:04 +03:00
Nekotekina 91db4b724c SPU: fix PUTLLC (TSX-FA) 
Some forgotten checks may affect performance.
 2020-10-13 17:46:03 +03:00
Nekotekina dcff8c2637 Fix remaining vm::reservation_lock usages (for now) 
Optimization can be restored later.
 2020-10-13 12:04:59 +03:00
Nekotekina dc39a9b84f SPU: Report 'GETLLAR took too long' 
Also move similar code in PPU.
 2020-10-13 00:12:11 +03:00
Nekotekina a806be8bc4 SPU: Implement S1/S2 (SNR) events (closes #8789) 
Add TSX path in push_snr()
Add locks bits in ch_events
 2020-10-12 21:41:57 +03:00
Eladash 95c1443e30
SPU: Validate reservation in GET commands (Accurate DMA) (#9062) 2020-10-12 15:20:06 +03:00
Nekotekina 5bd5a382c0 PPU: fix LDARX/LWARX in accurate mode (closes #9058) 
Fixup after #9048
Use SSE intrinsics in mov_rdata.
 2020-10-11 19:52:10 +03:00
Nekotekina 050c3e1d6b Rewrite cpu_thread::suspend_all 
Now it's a function of higher order.
Make only one thread do the hard work of thread pausing.
 2020-10-10 13:58:48 +03:00
Nekotekina 346a1d4433 vm: rewrite reservation bits 
Implement classic unique/shared locking concept.
Implement vm::reservation_light_op.
 2020-10-10 13:58:48 +03:00
Eladash 865464f607 SPU Local Storage capture 2020-10-08 19:05:14 +03:00
Eladash 493e57837b
SPU: Fix extremely rare bug of GETLLAR (#9011) 2020-10-03 09:31:28 +01:00
Eladash 56cebd99c2
SPU: Simplify logging of MFC commands (#9004) 2020-10-01 19:52:39 +03:00
Eladash f4ca6f02a1 PPU: Implement support for 128-byte reservations coherency 2020-09-28 22:34:42 +03:00
Eladash 09cddc84be SPU/PPU: Implement Atomic Cache Line Stores 2020-09-27 20:09:21 +03:00
Eladash bfa78870cb SPU: Fix unregistered channels in RCHCNT 
Shouldn't throw exception on realhw.
 2020-09-22 19:47:47 +03:00
Eladash ad37259ccc SPU: Implement many missing channel counts 2020-09-22 19:47:47 +03:00
Eladash c436ef0c6f
SPU: Implement channels 70, 71, add naming for channel 69 (#8932) 2020-09-19 13:08:35 +01:00
eladash 36ac68b436 SPU: Implement events channel count, minor interrupts fixes 2020-09-18 21:57:24 +03:00
Eladash 3206378ae6 sys_spu: Fix overexecution of cpu_return() 2020-09-12 22:11:40 +03:00
Eladash 7ce790f369 SPU: Use ASM for AVX2 coompilation instead of intrinsics 2020-09-12 18:49:49 +03:00
Eladash 9ff0b460a2 SPU: Make PUTLLUC LR event accurate 2020-09-11 09:02:18 +02:00
Eladash 4f0125a0e9 SPU: Remove "Accurate PUTLLUC" setting (always accurate) 2020-09-11 09:02:18 +02:00
Eladash 1e4655aef6
SPU: Remove STOP 0x0 hack (#8873) 2020-09-09 11:36:04 +01:00
Eladash 5060c779da
SPU: Use unaligned instructions in mov_rdata_avx (MSVC) (#8851) 2020-09-07 21:32:44 +01:00
Eladash abc715bc5c
SPU: Make PUT transfers use SEQ-CST ordering on Accurate DMA (#8844) 2020-09-06 12:09:14 +01:00
Eladash 2688081656 SPU: Use unaligned AVX instructions for cmp_data_avx 2020-09-06 07:51:12 +03:00
Eladash e4abd3dc5a SPU: Do not ignore pending PUT tranfers just becase GET may not be cache-line atomic 
This is not the proper way to emulate non-atomic GET tranfers, as it makes it seems as if PUT atomic tranfers arent atomic. (TODO)
Incomplete GET cache line accesses still do not verify data though.
 2020-09-05 22:23:55 +03:00
Eladash c7a185d4e7 SPU: Fix not acuiring reservation locks on DMA with more than one cache line (Accurate DMA) 2020-09-05 22:23:55 +03:00
Eladash 4ffc58a8ce SPU: Cleanup for Accurate PUTLLUC 
Should no longer affect GET commands because Accurate DMA is available for this functionality.
 2020-09-04 10:20:44 +02:00
Eladash c5c9ea1b21 SPU: Make GET's full and aligned cache line accesses atomic with Accurate DMA 2020-09-04 10:20:44 +02:00
Eladash 73d23eb6e6
SPU: Implement Accurate DMA (#8822) 2020-09-02 23:58:29 +02:00
Nekotekina ebc4a0188a Restore some code 2020-08-28 01:54:39 +03:00
Eladash 47b545282e
SPU: Fix events ACK, minor optimizations (#8771) 2020-08-27 21:36:54 +01:00
Eladash 841b8fad38 SPU: Fix timer events 2020-08-24 01:57:32 +03:00
Eladash 0f8ca1f7c5
SPU: Implement RSX accurate reservations on TSX (#8721) 2020-08-13 00:00:37 +01:00