Commit graph

42 commits

Author SHA1 Message Date
Eladash 3f48450408 sys_rsx: Minor atomicity fixes 2020-04-07 20:43:28 +03:00
Eladash 72d1efa383 rsx: Batch transform contants load methods 2020-04-05 15:21:56 +03:00
Eladash 2ed370093e rsx: Get rid of invalid_command_interrupt_raised 2020-04-02 20:42:12 +03:00
Eladash d97e9f7b4a rsx: Batch vertex program load methods 2020-04-02 20:42:12 +03:00
Eladash 768b4f8c65 rsx: Improve NV308A_COLOR
* Fix NV308A_COLOR methods range.
* Batch NV308A_COLOR methods execution together.
* Fix termination of bind_range<> in rsx methods binding.
2020-03-25 17:51:59 +03:00
Nekotekina 92e3eaf3ff Fix signed-unsigned comparisons and mark warning as error (part 2). 2020-02-19 22:54:58 +03:00
Eladash 9344b21484 rsx: Unify FIFO recovery methods
TODO: Maybe consider fifo stack content when recovering.
2020-02-14 17:11:26 +03:00
Eladash bdab26ec09 rsx: rewrite io mappings
Along with some with fixes to cellGcmSys HLE.
2020-02-10 21:39:39 +00:00
Nekotekina c0f80cfe7a Use attributes for LIKELY/UNLIKELY
Remove LIKELY/UNLIKELY macro.
2020-02-05 10:42:34 +03:00
Nekotekina 15391f45d0 Modernize RSX logging (rsx_log variable) 2020-02-01 11:52:22 +03:00
Eladash 85695c8bac rsx: FIFO wake-up pause control 2020-01-15 19:54:23 +03:00
Eladash 42fc698186 rsx: Enable primitive restart index only when needed (#6889)
* rsx: Enable primitive restart index only when needed

* rsx: Use if with initializer in read_put()
2019-10-28 23:16:27 +03:00
Eladash 5de0005f5a rsx: Report full method range on invalid methods
Also report full command on fifo desync event for the first time
2019-10-21 15:31:45 +03:00
plappermaul 2171ffdab2 minor optimization for FIFO_control::read_put() (#6768) 2019-10-14 21:26:31 +03:00
Eladash 06017cb14e rsx: Recover from invalid writes to CELL_GCM_NV4097_SET_INDEX_ARRAY_DMA
Also: Trigger a FIFO recovery when encountering an invalid method.
2019-10-10 19:34:23 +03:00
Eladash 70b4ae6bd6 rsx: Optimize FIFO PUT masking 2019-09-30 17:30:15 +03:00
Eladash 319fc8c55d rsx: Mask FIFO PUT on rsx execution 2019-09-29 13:05:24 +03:00
Eladash 822287b418 rsx: Avoid unsigned/signed mismatch with fifo ret addr 2019-09-29 13:05:24 +03:00
Eladash 500a4fa2fb rsx: Fix potential out of range methods execution (can result in segfaults) 2019-08-17 17:26:04 +01:00
scribam 635695ac78 rsx: Apply Clang-Tidy fix "modernize-use-emplace" 2019-06-12 15:11:52 +03:00
scribam 65581acbf9 rsx: Use constexpr for flattening_helper::m_register_properties 2019-06-12 10:59:31 +01:00
eladash 801e6114b6 rsx: Use relaxed store on fifo ctrl registers 2019-03-31 14:57:21 +03:00
kd-11 10a17feda2 rsx: Avoid potential deadlock in FIFO_ctrl 2019-01-25 14:34:22 +03:00
eladash 568206d11a Fix rsx capture (again) 2018-12-30 15:04:59 +01:00
eladash 098d634328 rsx fifo: Fix call cmd offset mask
highest 3 bits are masked according to tests, also filter certainly invalid jumps with offset higher than max
2018-12-15 19:40:18 +03:00
eladash c2aa10cccd reduce register_pair container 2018-12-15 19:40:18 +03:00
eladash 45ed58cdaf Fix rsx capture replay
Allow to capture non-increment cmd flag that was missing in command.reg
2018-12-15 19:40:18 +03:00
eladash 87988e9da8 rsx fifo: Stability improvements
* Restore stack in fifo error handling

* Update get register after the cmd execution

* Fix put pause in the middle of command

* Add restore points when branching to self

* Precise nopcmd detection

* Test all invalid cmds for early treatment of queue corruption
2018-12-15 19:40:18 +03:00
eladash b48a4b6459 rsx-capture: reduce capture size
* Dont bother capturing 'destination' blocks with no data. instead premap all main memory to ensure allocated
* Capture zcull and tile state as their compressed gcm forms
* Fix index array capturing, ignore empty sets
* hle gcm: Fix byteswaping in cellGcmSetZcull
2018-12-04 13:01:29 +03:00
kd-11 504ab5a6d4 rsx: Minor cleanup to silence stupid compiler warnings 2018-12-03 20:01:23 +03:00
kd-11 9d0042f509 rsx: Fixup for the flattener
- Reset the flattener before use
- Better detection of FIFO misalignment
2018-12-03 20:01:23 +03:00
kd-11 ec768afbd9 rsx: Flip workarounds for applications that flip via syscall
- Do not assume flip marks end-of-frame if executed via syscall
- Also disables skip_frame for these applications as there is no frame boundary
- NOTE: QUEUE_HEAD cannot be relied on as it is seemingly possible to flip the same head and not need to queue it
2018-11-30 23:51:25 +03:00
kd-11 1d19f71a46 rsx: Re-enable fifo error reset 2018-11-30 23:51:25 +03:00
kd-11 833c25894f [WIP] rsx: Rebase cleanup 2018-11-30 23:51:25 +03:00
kd-11 5193c99973 rsx: Enable dynamic FIFO preprocessing
- Tries to detect when FIFO preprocessing is beneficial and only enables optimizations if the benefit outweighs the cost
- Current threshold is at least 500 draw calls saved at over 2000 draw calls to justify the overhead
- TODO: More tuning for other CPUs
2018-11-30 23:51:25 +03:00
kd-11 2e32777375 rsx: Scrap the prebuffered queue approach
- Basically starting over
- The cost of making command copies into the queue has a measurable impact
2018-11-30 23:51:25 +03:00
kd-11 9deecd506a fixup: It is possible for NOP commands to contain other garbage 2018-11-30 23:51:25 +03:00
kd-11 435afcb865 rsx: Fix fifo draw barriers 2018-11-30 23:51:25 +03:00
kd-11 1ad76ad331 rsx: Restructure programs
- Also re-enable pipeline optimizations
2018-11-30 23:51:25 +03:00
kd-11 b0a6b72ce8 rsx: Optimizations
- Replace a few more vectors with simple_array<T>
- Avoid unnecessary string comparisons in backends. We already know referenced textures from the program analysers!
2018-11-30 23:51:25 +03:00
kd-11 677b16f5c6 rsx: Fixups
- Also fix visual corruption when using disjoint indexed draws

- Refactor draw call emit again (vk)

- Improve execution barrier resolve
  - Allow vertex/index rebase inside begin/end pair
  - Add ALPHA_TEST to list of excluded methods [TODO: defer raster state]

- gl bringup

- Simplify
  - using the simple_array gets back a few more fps :)
2018-11-30 23:51:25 +03:00
kd-11 e01d2f08c9 rsx: Refactor FIFO
- Removes fifo structures from common RSXThread
- Sets up a dedicated FIFO controller
- Allows for configurable queue optimizations
2018-11-30 23:51:25 +03:00