RPCSX/rpcsx
1
0
Fork 0
mirror of https://github.com/RPCSX/rpcsx.git synced 2025-12-06 07:12:14 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity
13616 commits 5 branches 1 tag 150 MiB
Commit graph

428 commits

Author SHA1 Message Date
Eladash 1cab99b3ca Make CPU Profiler able to print stats which sum up the records of all SPU threads 
Hitherto the statistics have been exclusively thread-specific.

Other improvements:
* Fixed container management so a collision of a new element with an older element of the record will become impossible.
* Added thread name to thread-specific information printing.
* Fixed condition to abort SPU block statistics collection, now matches SPU LLVM Profiler's.
* Fix possible division by 0 by checking `samples`.
 2022-05-07 12:57:54 +03:00
Nekotekina 6d3052c5dd Optimization: disable atomic_wait_engine notify callback for SPU 
Disable placebo callback calls in notify_all.
Don't use callback at all if TSX.
Based on kd-11 findings.
 2022-04-24 13:15:54 +03:00
sguo35 e761b3235c macos: fix build for arm64 
Adds arm64 branches to some x86 specific code and modifies some casting
logic to make Clang happy
 2022-04-18 17:53:54 +03:00
Eladash 6783bcd273 Log a snippet of guest thread code at crash 2022-04-15 22:34:51 +03:00
Eladash 1d51f3af0c RSX-Debugger: Implement backwards scrolling 
* Use 2 points of known true RSX code roots and follow them in order to peek at the current section of valid RSX code:
These roots are: current RSX instruction address and the last targeted address by a branch instruction.
 2022-04-15 22:34:51 +03:00
Eladash e951c619c5
Implement Emulator::GracefulShutdown() 2022-02-05 11:49:29 +01:00
Nekotekina 580bd2b25e Initial Linux Aarch64 support 
* Update asmjit dependency (aarch64 branch)
* Disable USE_DISCORD_RPC by default
* Dump some JIT objects in rpcs3 cache dir
* Add SIGILL handler for all platforms
* Fix resetting zeroing denormals in thread pool
* Refactor most v128:: utils into global gv_** functions
* Refactor PPU interpreter (incomplete), remove "precise"
* - Instruction specializations with multiple accuracy flags
* - Adjust calling convention for speed
* - Removed precise/fast setting, replaced with static
* - Started refactoring interpreters for building at runtime JIT
*   (I got tired of poor compiler optimizations)
* - Expose some accuracy settings (SAT, NJ, VNAN, FPCC)
* - Add exec_bytes PPU thread variable (akin to cycle count)
* PPU LLVM: fix VCTUXS+VCTSXS instruction NaN results
* SPU interpreter: remove "precise" for now (extremely non-portable)
* - As with PPU, settings changed to static/dynamic for interpreters.
* - Precise options will be implemented later
* Fix termination after fatal error dialog
 2022-01-15 06:48:04 +03:00
Nekotekina 3cd8891ab8 Re-refactor copy_data_swap_u32 again 
Drop AVX2 path for now, since it usually operates on small data.
Rely on automatic SSE vectorization on recent compilers.
Side refactoring on JIT.h to workaround weird conflict issue.
 2021-12-26 14:40:21 +03:00
Nekotekina 6730dc1dc4 LLVM DSL: print some debug info in get_const_vector<v128> 2021-12-07 13:21:24 +03:00
Nekotekina 04c9d01390 PPU LLVM: modernize most vector instructions 
Rewritten VSUM instructions:
VSUMSWS, VSUM2SWS, VSUM4SBS, VSUM4SHS, VSUM4UBS
 2021-12-03 00:14:06 +03:00
Malcolm Jestadt 7573d7289b SPU LLVM: Hook up 128 bit spu verification 
- Also fix FMA enablement for sapphirerapids
 2021-11-06 21:12:12 +03:00
Ani 1a0392bf15
CPUTranslator: Enable FMA for alderlake CPUs (#11106) 2021-11-03 19:31:46 +00:00
Nekotekina 69f321a471 LLVM 13 2021-11-02 20:11:08 +03:00
Eladash edcc2a9e0d PS3 String Searcher: Implement instruction searching in embedded SPU images 2021-10-30 21:33:06 +02:00
Malcolm Jestadt f06c8b22e8 PPU/SPU LLVM: Emulate VPERM2B with a 256 bit wide VPERMB 
- Save 1 uop by using 256 wide VPERMB instead of VPERM2B. (Compiles down to a vinserti128 and vpermb)
 2021-10-13 17:51:54 +03:00
Eladash ab50e5483e
GUI Utilities: Implement instruction search, PPU/SPU disasm improvements (#10968) 
* GUI Utilities: Implement instruction search in PS3 memory
* String Searcher: Case insensitive search
* PPU DisAsm: Comment constants with ORI
* PPU DisAsm: Add 64-bit constant support
* SPU/PPU DisAsm: Print CELL errors in disasm
* PPU DisAsm: Constant comparison support
 2021-10-12 23:12:30 +03:00
Megamouse c7e5a62909 Add missing cpu_flag formatting 2021-10-05 20:16:11 +02:00
Nekotekina 55ec4808f1 SPU LLVM Fixup for VDBPSADBW 
Fixes #10947
 2021-09-30 17:53:47 +03:00
Malcolm Jestadt 2cfa5406e7 LLVM DSL: reimplement vdbpsadbw 2021-09-30 13:22:35 +03:00
Malcolm Jestadt f9ab077908 SPU LLVM: Use VDBPSADBW in SUMB 
- This instruction can be used to sum bytes horrizontally if the second input vector is all zeroes.
 2021-09-30 13:22:35 +03:00
Ani df96be199b config: Remove Lower SPU Priority setting 2021-09-26 00:29:21 +01:00
Eladash ddec5d6908 CPUThread: Prevent recursive check_state calls 2021-09-17 14:02:22 +03:00
Eladash 975aae1d13 SPU MFC: Implement MFC commands execution shuffling 2021-09-17 11:38:10 +03:00
Nekotekina d28b0ba2fa SPU LLVM: implement spu_re, spu_rsqrte 
Improve matching with peek_through_bitcasts() helper.
Implement erase_stores() helper.
 2021-09-17 10:23:43 +03:00
Nekotekina 543fb7a9cb LLVM DSL / SPU LLVM: implement infinite precision shifts 
Remove old make_*** helpers in favor of matcheable expressions.
 2021-09-17 10:23:43 +03:00
Nekotekina 67b3fc70f8 LLVM DSL: implement absd and match helpers 
Matcheable expression absd(a, b) (absolute difference).
 2021-09-17 10:23:43 +03:00
Nekotekina 2268aa9093 LLVM DSL: reimplement fre, frsqe, fmax, fmin 2021-09-17 10:23:43 +03:00
Nekotekina 4b8ee85995 LLVM DSL: reimplement pshufb, add 'calli' 
Implement postponed custom intrinsic replacement.
Make bitcast operator static like other ones.
 2021-09-17 10:23:43 +03:00
Nekotekina 7ec7f261b1 LLVM DSL: implement fpcast 2021-09-17 10:23:43 +03:00
Nekotekina 1685769bd9 LLVM DSL: reimplement fmuladd, force hw fma if present 2021-09-17 10:23:43 +03:00
Nekotekina 7cf9d1380b LLVM DSL: add line number in get_const_vector automatically 2021-09-17 10:23:43 +03:00
Nekotekina f188019244 LLVM DSL: reimpelement fsqrt, fabs 2021-09-17 10:23:43 +03:00
Nekotekina 38dfc88e8d LLVM DSL: reimplement avg 2021-09-17 10:23:43 +03:00
Nekotekina 95c36221fa LLVM DSL: reimplement ctlz, ctpop 2021-09-17 10:23:43 +03:00
Malcolm Jestadt 43cc62d267 SPU LLVM: Add m_use_vnni 
- Alderlake and Sapphirerapids will require an update to the llvm fork before they can be detected
 2021-08-31 14:02:05 +03:00
Malcolm Jestadt d304b52391 SPU LLVM: Add VNNI optimized variant of sumb 
- Uses vpdpbusd to horrizontally add values, for some reason this is much faster than the normal horizontal add instructions.
 2021-08-31 14:02:05 +03:00
Nekotekina 286e154d05 SPU Profiler: adjust accumulation logic 
Don't append trampoline time to verification time.
 2021-08-01 09:59:00 +03:00
Nekotekina 2f6db5802f Fix CPU Profiler regression 2021-07-30 09:21:11 +03:00
Nekotekina 571bdfc828 Fixup for #10490 
Restore explicit signaling of RSX thread for now.
 2021-06-27 14:02:32 +03:00
Eladash 0aed00a758
Improve thread aborting mechanism (#10490) 
Call pseudo-virtual operator=(thread_state) of thread context.
 2021-06-27 11:43:48 +03:00
Eladash 0531b3d801
rsx: Fix emulation stopping in cpu_thread::is_paused poll (#10475) 
Ignore pause flags if thread is stopped.
 2021-06-20 20:00:12 +03:00
Eladash 76bf720adf Improve emulation stopping speed 
Split phases of signalling threads and joining them.
 2021-06-08 18:26:14 +03:00
Eladash 6ff9aab2ca Fix cpu_thread::check_state() cpu_flag::temp support 2021-05-28 20:25:16 +03:00
Eladash 5f47730fc0 Fix reservations handling in logs 
Remove reservation cb.
 2021-05-28 20:25:16 +03:00
Nekotekina 2491aad6f2 types.hpp: implement min_v<>, max_v<>, SignedInt, UnsignedInt, FPInt concepts 
Restrict smax to only work with signed values for consistency.
Cleanup <climits> includes.
Cleanup <limits> includes.
 2021-05-23 19:43:51 +03:00
Eladash 638f20c80f Improve get_current_cpu_thread() 2021-05-20 09:25:51 +03:00
Eladash 94e2f464e3 CPU Profiler: weak_ptr -> shared_ptr 2021-05-15 00:31:14 +03:00
Paul 4e12e70929
Add Intel's Rocket Lake 11th gen cpu. (#10205) 
This does nothing but may be required later.
 2021-05-13 11:34:37 +03:00
David Carlier 082bbc7336 Following up on MacOS build fix. 
Specialisation of llvm_value_t to allow build with LLVM this time.
 2021-04-23 15:20:40 +03:00
Nekotekina 9d4fcbf946 bs_t<>: fix/cleanup some operators 2021-04-17 15:54:33 +03:00