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169 commits

Author SHA1 Message Date
Eladash 6a51c27fde PPU LLVM: Fix VMAXFP, VMINFP NaN handling 2020-08-03 15:43:00 +01:00
Eladash dd497625a5 PPU LLVM: Fix constant folding of BitCast 2020-07-30 17:06:24 +01:00
Eladash f6764767f6 SPU/PPU LLVM: Fix cpu_translator::get_const_vector<v128>() 2020-07-30 17:06:24 +01:00
Whatcookie 9f829b375a
SPU/PPU LLVM: Optimize VSEL/SELB with constant mask (#8559) 2020-07-25 17:59:35 +01:00
Eladash da44d5f10d
PPU: Fix DIVW, DIVWU, MULHW, MULLW, MULHWU when op.rc is set (#8630) 2020-07-25 17:13:58 +01:00
Eladash 917069e31a
PPU Precise/LLVM: Support NJ modes (#8617) 2020-07-25 07:41:41 +01:00
Eladash 3354c800d7
SPU/PPU LLVM: Improve expressions matching (#8620) 2020-07-24 16:53:48 +01:00
sampletext32 1a8fb61373 Fix some misspells 
Note: in main.cpp there are many dirs similar to Program Files, so tip should be appropriate.
 2020-05-20 22:53:24 +03:00
Nick Renieris 78ac2a86bb PPU LLVM: Accurate vector instruction NaNs 
Tested with https://github.com/RPCS3/ps3autotests/tree/master/tests/cpu/ppu_vpu,
results in that test improved by about half.
 2020-05-14 11:14:28 +01:00
Nekotekina e1042bc631 Get rid of "module" keyword 
Workaround some intellisense problems.
 2020-05-06 18:20:11 +03:00
Nekotekina 58ba6d68bb Don't use std::popcount (workaround) 
It seems MSVC uses POPCNT instruction when compiling for SSE2.
 2020-04-25 18:01:39 +03:00
Eladash dbce10d0e3
PPU LLVM: Fix rounding regression of FNMADDS, FNMSUBS (#8066) 
* PPU LLVM: Fix rounding regression of FNMADDS, FNMSUBS
 2020-04-19 20:55:26 +01:00
rxys 5101bc189e
Fix FMA copypasta (#8060) 2020-04-19 19:17:19 +01:00
Nekotekina f72af2973d Replace utils::popcnt32 with std::popcount 
Cleanup includes.
 2020-04-14 16:05:58 +03:00
Whatcookie 6b0f7a8f55
PPU LLVM: Optimize altivec FMA with 0 addend (#8013) 
- When VMADDFP and VNMSUBFP are used with a constant addend of 0, they can be simplified into a single floating multiply
 2020-04-12 09:52:21 +01:00
Eladash 158b24ec25 SPU LLVM: Add accurate double-precision FMA support 2020-04-09 17:27:14 +03:00
Eladash 92f821aeb1
PPU LLVM: Add FMA accuracy setting (#7874) 
* PPU LLVM : Match PS3 for the instructions fmadd, fmadds, fmsub, fmsubs, fnmadd, fnmadds, fnmsub, fnmsubs

Co-authored-by: doesthisusername <yfirestorm@gmail.com>
 2020-03-31 20:01:10 +03:00
Eladash 7ed570dc4a PPU LLVM: Add relocation 5 for ADDIS 
+ Add some more for u16 relocations (4, 5, 6), simplify logic.
 2020-03-26 17:52:45 +03:00
Nekotekina fa29c5aa94 ppu_iname: refactor to use actual strings 2020-03-26 15:28:41 +03:00
Eladash 453478c98b PPU LLVM: Log unsupported relocation opcode 2020-03-26 15:22:45 +03:00
Nekotekina 1ceb779a38 Make ppu_decoder<> objects constexpr (partial) 2020-03-24 13:46:46 +03:00
Nekotekina 5ebc538d7e Workaround for VS 16.5 
Strange codegen bug didn't promote s32 to u64.
 2020-03-23 14:48:49 +03:00
Eladash cccc32fa9d
sys_lwmutex/lwcond: track lwcond waiters (#7826) 
In lwmutex destroy syscall, wait for pending waiters.
 2020-03-23 10:30:17 +03:00
Malcolm Jestadt 0bfdc1f62e PPU LLVM: Improve VMADDFP and VNMSUBFP 
- Use native FMA to emulate VMADDFP, with a fallback for processors that don't support FMA
- Use native FMA to emulate VNMSUBFP as well, but note that it differs from the emulated path with regards to negative zero
 2020-03-19 06:47:16 +03:00
Nekotekina 04dedb17eb Disable exception handling. 
Use -fno-exceptions in cmake.
On MSVC, enable _HAS_EXCEPTION=0.
Cleanup throw/catch from the source.
Create yaml.cpp enclave because it needs exception to work.
Disable thread_local optimizations in logs.cpp (TODO).
Implement cpu_counter for cpu_threads (moved globals).
 2020-03-12 16:03:08 +03:00
Nekotekina e4a81b1d13 Move Log.h to util/logs.hpp 2020-03-07 12:29:23 +03:00
Nekotekina 0a41999818 PPU LLVM: fix regression from warning fixes 
Forgot that negative power is used here.
 2020-03-05 11:07:40 +03:00
Nekotekina Aux1 250736ece5 Fix warnings in emucore 2020-03-04 21:23:34 +03:00
Nekotekina 5b0476e772 Update LLVM to new llvm-mirror (LLVM 11) 
Use clang-cl to build LLVM on Windows.
 2020-03-03 18:33:02 +03:00
Nekotekina 92e3eaf3ff Fix signed-unsigned comparisons and mark warning as error (part 2). 2020-02-19 22:54:58 +03:00
Nekotekina 327bb2d8f0 Modernize PPU logging (ppu_log variable) 2020-02-01 11:52:24 +03:00
Eladash 923cd7ad72 SPU LLVM: rewrite comparison on non-xfloat path of CFLTU, CFLTS 
CFLTU on non-xfloat path is accurate as xfloat path now.
* Also optimize FCTIW like FCTIWZ (PPU)
 2019-12-30 22:20:34 +03:00
Nekotekina 185c067d5b C-style cast cleanup V 2019-12-03 17:23:00 +03:00
Nekotekina 6e19881b82 Update LLVM (10) 2019-10-23 16:01:14 +03:00
Eladash a902874b01 Fixup after #6286 2019-08-13 13:34:14 +03:00
Eladash 4b82006984 ppu: Improve LWSYNC 
Block load<->load reordering as real lwsync.
 2019-08-13 04:56:00 +03:00
Eladash a560498cd4 ppu: Improve FCTIW, FCTIWZ, FCTID and FCTIDZ 2019-08-13 04:56:00 +03:00
Eladash 43f919c04b Fixup after #6143 (#6146) 
vm::spu max address was overflowing resulting in issues, so cast to u64 where needed. Fixes #6145.
    Use vm::get_addr instead of manually substructing vm::base(0) from pointer in texture cache code.
    Prefer std::atomic_thread_fence over _mm_?fence(), adjust usage to be more correct.
    Used sequantially consistent ordering in semaphore_release for TSX path as well.
    Improved memory ordering for sys_rsx_context_iounmap/map.
    Fixed sync bugs in HLE gcm because of not using atomic instructions.
    Use release memory barrier in lwsync for PPU LLVM, according to this xbox360 programming guide lwsync is a hw release memory barrier.
    Also use release barrier where lwsync was originally used in liblv2 sys_lwmutex and cellSync.
    Use acquire barrier for isync instruction, see https://devblogs.microsoft.com/oldnewthing/20180814-00/?p=99485
 2019-06-29 18:48:42 +03:00
JohnHolmesII be521ff0ab Fix warnings related to parentheses 2019-06-25 20:36:32 -07:00
Nekotekina 7492f335e9 SPU analyser: basic function detection in Giga mode 
Misc: fix EH frame registration (LLVM, non-Windows).
Misc: constant-folding bitcast (cpu_translator).
Misc: add syntax for LLVM arrays (cpu_translator).
Misc: use function names for proper linkage (SPU LLVM).

Changed function search and verification in Giga mode.
Basic stack frame layout analysis.
Function detection in Giga mode.
Basic use of new information in SPU LLVM.
Fixed jump table compilation in SPU LLVM.
Disable broken optimization in Accurate xfloat mode.
Make compiled SPU modules position-independent in SPU LLVM.

Optimizations include but not limited to:
 * Compiling SPU functions as native functions when eligible
 * Avoiding register context write-out
 * Aligned stack assumption (CWD alike instruction)
 2019-05-11 02:13:19 +03:00
Nekotekina 2ade3c594c LLVM DSL: expression matching (preview 2) 
Implement more instructions.
 2019-04-25 03:33:18 +03:00
Nekotekina ac473eb400 Rewrite cpu_translator::rol, add fshl and fshr 
Use new funnel shift intrinsics
 2019-04-24 23:55:41 +03:00
Nekotekina 42448cf3e5 Remove cpu_translator::scarry, cpu_translator::merge 2019-04-24 23:55:41 +03:00
Nekotekina 524aac75ed LLVM DSL: rewrite bitcast, zext, sext, trunc, select, min, max ops 
Are made composable in expressions similar to arithmetic ops.
Implement noncast in addition to bitcast (no-op case).
Implement bitcast constant folding.
Fixed some misuse of sext<>.
 2019-04-24 23:55:41 +03:00
eladash b307aff9eb Prefetch byteswapped opcodes in ppu interpreter 2019-04-11 17:47:52 +03:00
eladash 3304e3b0b7 PPU LLVM: Fix STSWI and LSWI 2019-04-11 17:47:52 +03:00
eladash f028737db8 Implement fallback for PPU LLVM 
This matches with interpreter implementation, fixing unregistered functions in lost cases
 2019-04-11 17:47:52 +03:00
Nekotekina d873802b9c Use LLVM 9 
Use new add/sub with saturation intrinsics
 2019-03-30 01:36:48 +03:00
Nekotekina 7e0b941e9f PPU LLVM: implement get_vrs<>() adaptor 
Make use of structured bindings
 2019-03-30 01:36:48 +03:00
eladash fb8302817f ppu: Set link unconditionally 2018-12-10 01:34:02 +03:00
Nekotekina b2f29cd4d4 LLVM: remove false alarm errors 
Writable sections ARE supported
 2018-09-27 12:16:43 +03:00
scribam f294729b28 ppu: improve lvebx/lvehx/lvewx instructions 2018-09-11 21:20:52 +03:00
Nekotekina a424fcfcf7 PPU LLVM: fix phenoms 2018-08-12 02:42:32 +03:00
Nekotekina 03e6725fcf PPU LLVM: simplify VMSUMUHS 2018-07-21 12:18:07 +03:00
scribam 2ed6e51d24 ppu: improve vnmsubfp instruction 2018-07-09 03:33:05 +04:00
scribam 733efc6b0d ppu: improve fnmsubs instruction 2018-07-09 03:33:05 +04:00
scribam f1e6532ec0 ppu: improve fnmsub instruction 2018-07-09 03:33:05 +04:00
Nekotekina 2f0dc9bd0f PPU LLVM: simplify VSUBCUW, VSUBUBS, VSUBUHS, VSUBUWS 2018-07-06 00:33:52 +03:00
Nekotekina 9d9869e803 PPU LLVM: simplify VADDCUW, VADDUBS, VADDUHS, VADDUWS 2018-07-06 00:33:52 +03:00
Nekotekina a0bf103e8b Implement cpu_translator::pshufb<>() 
Remove spu_translator::pshufb<>()
Improve PSHUFB emulation (pre-SSSE3)
Emit static shufflevector for the constant mask
PPU: Inline VPERM instruction
 2018-07-06 00:33:52 +03:00
Nekotekina e009bbac10 Use LLVM 7 (master) 2018-07-06 00:33:52 +03:00
isJuhn 3d8223fccc Fix LLVM STW reservation update 2018-07-02 15:19:50 +04:00
Jake edeb858138 loader: ignore invalid index_value and allow relative reloc 10 2018-06-24 14:29:41 +04:00
isJuhn 83f096c435 Add conditional reservation update to STW 2018-06-23 23:13:34 +04:00
jjsat 53ca2526ed Fix VSLO and VSRO in the LLVM PPU recompiler 2018-06-10 20:12:40 +04:00
Nekotekina a975ecdc4f Use LLVM 6 2018-05-08 13:05:29 +03:00
Nekotekina 8b704588d0 Update cpu_translator 2018-05-08 13:05:29 +03:00
Nekotekina db229dffb0 PPU LLVM: minor update 2018-05-08 13:05:29 +03:00
VelocityRa 706faa1d32 PPUTranslator: Ignore relative relocations 2018-04-01 01:32:08 +04:00
Nekotekina cce0ad0c35 Clean vm::ps3 namespace use 2018-02-09 17:49:37 +03:00
Nekotekina b01e460863 PPU LLVM: rewrite AVG instructions 2018-02-08 21:10:03 +03:00
Nekotekina 93c0a0aa35 PPU LLVM: rewrite add/sub instructions 
Use new patterns for saturation instructions
Avoid ZExt/SExt completely
 2018-02-08 21:10:03 +03:00
Nekotekina db83113316 Initial cpu_translator impl 2018-02-08 21:10:03 +03:00
Nekotekina 140a581d23 PPU: redesign LVSL, LVSR instructions 2017-12-20 00:04:09 +03:00
scribam 3e7ed8a831 PPUTranslator minor changes 2017-11-08 08:34:00 +04:00
Nekotekina f9a69c449d PPU LLVM: minor bitcast avoidance 2017-07-23 11:03:38 +03:00
Nekotekina bab537c7e2 PPU LLVM: unuse FP_SAT_OP 2017-07-12 14:00:38 +03:00
RipleyTom 34709eb399 Fix Stswi instruction 2017-07-10 18:42:02 +03:00
Nekotekina f0d184f38b PPU LLVM: relocation support 2017-07-04 02:04:22 +03:00
Nekotekina c087a9534a PPU LLVM: SSA reordering 
Fetch indirect jump target
Flush registers earlier
 2017-06-29 17:48:55 +03:00
Nekotekina da87bb6710 PPU LLVM: minor fix 2017-06-29 17:48:55 +03:00
Nekotekina 3c064439b3 PPU LLVM: new mptr/cptr format 2017-06-29 17:48:55 +03:00
Nekotekina 85f8a42bd2 PPU: MTOCRF optimization 2017-06-29 17:48:55 +03:00
Nekotekina ef55d6fa0c PPU LLVM: less trash, fix crash 2017-06-29 17:48:55 +03:00
Nekotekina aa34fa8baa PPU LLVM: some passes disabled 2017-06-29 17:48:55 +03:00
Nekotekina fc2a45d6d6 Removed unnecessary code 2017-06-29 17:48:55 +03:00
Nekotekina 89f676de75 PPU: preparations (no fixes) 2017-06-26 16:56:13 +03:00
Nekotekina 061c92ba1f PPU LLVM: Improve FlushRegisters 2017-06-26 16:56:13 +03:00
Nekotekina 8034196c25 ppu_syscall_code type added (for fmt) 2017-06-26 16:56:13 +03:00
Nekotekina 1196e9decc PPU LLVM: remove unnecessary code 2017-06-26 16:56:13 +03:00
Nekotekina cd4f290d3d PPU LLVM: v2, simplification (no allocas) 2017-06-26 16:56:13 +03:00
Nekotekina 45fae363c6 PPU LLVM: MFCR optimized 2017-06-26 16:56:13 +03:00
Nekotekina aea094730b PPU LLVM: paradigm shift 
For now, compile only one block at time
Use tail calls to move between blocks
Fully write PPU context (except CIA)

This fixes many compatibility problems
 2017-06-23 20:09:33 +03:00
Nekotekina a29d7d3962 LLVM: implement STSWI, LSWI... 
Fix DIVD, DIVDU, DIVW, DIVWU, MULHW
Removed __adde_get_ca in ADDE, SUBFE
 2017-06-23 20:09:33 +03:00
Nekotekina 9b43203111 offset32(): pointer-to-member arithmetic 2017-04-20 00:17:16 +03:00
Nekotekina b1f1a5885b PPU LLVM improved 2017-04-16 17:44:19 +03:00
Nekotekina 3bfe17a14f PPU: HACK instruction removed 
Breakpoints fixed
 2017-03-22 23:23:47 +03:00
Nekotekina 4fc8276f0f LLVM: fix FCTIW, FCTID 2017-03-21 20:16:41 +03:00
Nekotekina aad035c4b5 LLVM: fix FCTIWZ, FCTIDZ 2017-03-21 20:16:41 +03:00
Nekotekina c2cd0c994f LLVM: volatile load for state 2017-03-21 20:16:41 +03:00