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LLVM: enable some JIT events (Intel, Perf)

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Made some related adjustments.
Currently incomplete.
This commit is contained in:
Nekotekina 2021-12-24 20:33:32 +03:00
parent 510041a873
commit d836033212
16 changed files with 233 additions and 162 deletions
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6
rpcs3/Emu/Cell/PPUFunction.cpp
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@ -1910,14 +1910,14 @@ std::vector<ppu_function_t>& ppu_function_manager::access(bool ghc)
static std::vector<ppu_function_t> list_ghc
{
build_function_asm<ppu_function_t>([](asmjit::X86Assembler& c, auto& args)
build_function_asm<ppu_function_t>("ppu_unregistered", [](asmjit::X86Assembler& c, auto& args)
{
using namespace asmjit;
c.mov(args[0], x86::rbp);
c.jmp(imm_ptr(list[0]));
}),
build_function_asm<ppu_function_t>([](asmjit::X86Assembler& c, auto& args)
build_function_asm<ppu_function_t>("ppu_return", [](asmjit::X86Assembler& c, auto& args)
{
using namespace asmjit;
@ -1937,7 +1937,7 @@ u32 ppu_function_manager::add_function(ppu_function_t function)
list.push_back(function);
// Generate trampoline
list2.push_back(build_function_asm<ppu_function_t>([&](asmjit::X86Assembler& c, auto& args)
list2.push_back(build_function_asm<ppu_function_t>("ppu_trampolinea", [&](asmjit::X86Assembler& c, auto& args)
{
using namespace asmjit;