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PPU LLVM arm64+macOS port (#12115)
* BufferUtils: use naive function pointer on Apple arm64
Use naive function pointer on Apple arm64 because ASLR breaks asmjit.
See BufferUtils.cpp comment for explanation on why this happens and how
to fix if you want to use asmjit.
* build-macos: fix source maps for Mac
Tell Qt not to strip debug symbols when we're in debug or relwithdebinfo
modes.
* LLVM PPU: fix aarch64 on macOS
Force MachO on macOS to fix LLVM being unable to patch relocations
during codegen. Adds Aarch64 NEON intrinsics for x86 intrinsics used by
PPUTranslator/Recompiler.
* virtual memory: use 16k pages on aarch64 macOS
Temporary hack to get things working by using 16k pages instead of 4k
pages in VM emulation.
* PPU/SPU: fix NEON intrinsics and compilation for arm64 macOS
Fixes some intrinsics usage and patches usages of asmjit to properly
emit absolute jmps so ASLR doesn't cause out of bounds rel jumps. Also
patches the SPU recompiler to properly work on arm64 by telling LLVM to
target arm64.
* virtual memory: fix W^X toggles on macOS aarch64
Fixes W^X on macOS aarch64 by setting all JIT mmap'd regions to default
to RW mode. For both SPU and PPU execution threads, when initialization
finishes we toggle to RX mode. This exploits Apple's per-thread setting
for RW/RX to let us be technically compliant with the OS's W^X
enforcement while not needing to actually separate the memory
allocated for code/data.
* PPU: implement aarch64 specific functions
Implements ppu_gateway for arm64 and patches LLVM initialization to use
the correct triple. Adds some fixes for macOS W^X JIT restrictions when
entering/exiting JITed code.
* PPU: Mark rpcs3 calls as non-tail
Strictly speaking, rpcs3 JIT -> C++ calls are not tail calls. If you
call a function inside e.g. an L2 syscall, it will clobber LR on arm64
and subtly break returns in emulated code. Only JIT -> JIT "calls"
should be tail.
* macOS/arm64: compatibility fixes
* vm: patch virtual memory for arm64 macOS
Tag mmap calls with MAP_JIT to allow W^X on macOS. Fix mmap calls to
existing mmap'd addresses that were tagged with MAP_JIT on macOS. Fix
memory unmapping on 16K page machines with a hack to mark "unmapped"
pages as RW.
* PPU: remove wrong comment
* PPU: fix a merge regression
* vm: remove 16k page hacks
* PPU: formatting fixes
* PPU: fix arm64 null function assembly
* ppu: clean up arch-specific instructions
This commit is contained in:
Jeff Guo
GitHub
parent
264253757c
commit
cefc37a553
14 changed files with 306 additions and 16 deletions
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@ -65,6 +65,10 @@
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#include "util/simd.hpp"
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#include "util/sysinfo.hpp"
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#ifdef __APPLE__
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#include <libkern/OSCacheControl.h>
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#endif
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extern atomic_t<u64> g_watchdog_hold_ctr;
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// Should be of the same type
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@ -247,7 +251,104 @@ const auto ppu_gateway = build_function_asm<void(*)(ppu_thread*)>("ppu_gateway",
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c.ret();
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#else
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// See https://github.com/ghc/ghc/blob/master/rts/include/stg/MachRegs.h
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// for GHC calling convention definitions on Aarch64
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// and https://developer.arm.com/documentation/den0024/a/The-ABI-for-ARM-64-bit-Architecture/Register-use-in-the-AArch64-Procedure-Call-Standard/Parameters-in-general-purpose-registers
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// for AArch64 calling convention
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// Push callee saved registers to the stack
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// We need to save x18-x30 = 13 x 8B each + 8 bytes for 16B alignment = 112B
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c.sub(a64::sp, a64::sp, Imm(112));
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c.stp(a64::x18, a64::x19, arm::Mem(a64::sp));
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c.stp(a64::x20, a64::x21, arm::Mem(a64::sp, 16));
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c.stp(a64::x22, a64::x23, arm::Mem(a64::sp, 32));
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c.stp(a64::x24, a64::x25, arm::Mem(a64::sp, 48));
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c.stp(a64::x26, a64::x27, arm::Mem(a64::sp, 64));
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c.stp(a64::x28, a64::x29, arm::Mem(a64::sp, 80));
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c.str(a64::x30, arm::Mem(a64::sp, 96));
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// Save sp for native longjmp emulation
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Label native_sp_offset = c.newLabel();
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c.ldr(a64::x10, arm::Mem(native_sp_offset));
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c.str(a64::sp, arm::Mem(args[0], a64::x10));
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// Load REG_Base - use absolute jump target to bypass rel jmp range limits
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Label exec_addr = c.newLabel();
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c.ldr(a64::x19, arm::Mem(exec_addr));
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c.ldr(a64::x19, arm::Mem(a64::x19));
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// Load PPUThread struct base -> REG_Sp
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const arm::GpX ppu_t_base = a64::x20;
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c.mov(ppu_t_base, args[0]);
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// Load PC
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const arm::GpX pc = a64::x26;
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Label cia_offset = c.newLabel();
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const arm::GpX cia_addr_reg = a64::x11;
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// Load offset value
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c.ldr(cia_addr_reg, arm::Mem(cia_offset));
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// Load cia
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c.ldr(pc, arm::Mem(ppu_t_base, cia_addr_reg));
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// Zero top 32 bits
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c.mov(a64::w26, a64::w26);
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// Multiply by 2 to index into ptr table
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const arm::GpX index_shift = a64::x27;
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c.mov(index_shift, Imm(2));
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c.mul(pc, pc, index_shift);
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// Load call target
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const arm::GpX call_target = a64::x28;
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c.ldr(call_target, arm::Mem(a64::x19, pc));
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// Compute REG_Hp
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const arm::GpX reg_hp = a64::x21;
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c.mov(reg_hp, call_target);
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c.lsr(reg_hp, reg_hp, 48);
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c.lsl(reg_hp, reg_hp, 13);
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// Zero top 16 bits of call target
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c.lsl(call_target, call_target, Imm(16));
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c.lsr(call_target, call_target, Imm(16));
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// Load registers
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Label base_addr = c.newLabel();
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c.ldr(a64::x22, arm::Mem(base_addr));
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c.ldr(a64::x22, arm::Mem(a64::x22));
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Label gpr_addr_offset = c.newLabel();
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const arm::GpX gpr_addr_reg = a64::x9;
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c.ldr(gpr_addr_reg, arm::Mem(gpr_addr_offset));
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c.add(gpr_addr_reg, gpr_addr_reg, ppu_t_base);
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c.ldr(a64::x23, arm::Mem(gpr_addr_reg));
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c.ldr(a64::x24, arm::Mem(gpr_addr_reg, 8));
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c.ldr(a64::x25, arm::Mem(gpr_addr_reg, 16));
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// Execute LLE call
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c.blr(call_target);
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// Restore stack ptr
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c.ldr(a64::x10, arm::Mem(native_sp_offset));
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c.ldr(a64::sp, arm::Mem(args[0], a64::x10));
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// Restore registers from the stack
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c.ldp(a64::x18, a64::x19, arm::Mem(a64::sp));
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c.ldp(a64::x20, a64::x21, arm::Mem(a64::sp, 16));
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c.ldp(a64::x22, a64::x23, arm::Mem(a64::sp, 32));
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c.ldp(a64::x24, a64::x25, arm::Mem(a64::sp, 48));
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c.ldp(a64::x26, a64::x27, arm::Mem(a64::sp, 64));
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c.ldp(a64::x28, a64::x29, arm::Mem(a64::sp, 80));
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c.ldr(a64::x30, arm::Mem(a64::sp, 96));
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// Restore stack ptr
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c.add(a64::sp, a64::sp, Imm(112));
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// Return
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c.ret(a64::x30);
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c.bind(exec_addr);
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c.embedUInt64(reinterpret_cast<u64>(&vm::g_exec_addr));
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c.bind(base_addr);
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c.embedUInt64(reinterpret_cast<u64>(&vm::g_base_addr));
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c.bind(cia_offset);
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c.embedUInt64(static_cast<u64>(::offset32(&ppu_thread::cia)));
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c.bind(gpr_addr_offset);
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c.embedUInt64(static_cast<u64>(::offset32(&ppu_thread::gpr)));
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c.bind(native_sp_offset);
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c.embedUInt64(static_cast<u64>(::offset32(&ppu_thread::saved_native_sp)));
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#endif
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});
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@ -1252,6 +1353,9 @@ void ppu_thread::cpu_task()
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}
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case ppu_cmd::initialize:
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{
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#ifdef __APPLE__
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pthread_jit_write_protect_np(false);
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#endif
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cmd_pop();
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while (!g_fxo->get<rsx::thread>().is_inited && !is_stopped())
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@ -1267,6 +1371,15 @@ void ppu_thread::cpu_task()
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thread_ctrl::wait_on<atomic_wait::op_ne>(g_progr_ptotal, 0);
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g_fxo->get<progress_dialog_workaround>().skip_the_progress_dialog = true;
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#ifdef __APPLE__
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pthread_jit_write_protect_np(true);
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#endif
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#ifdef ARCH_ARM64
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// Flush all cache lines after potentially writing executable code
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asm("ISB");
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asm("DSB ISH");
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#endif
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break;
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}
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case ppu_cmd::sleep:
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@ -1396,6 +1509,15 @@ ppu_thread::ppu_thread(const ppu_thread_params& param, std::string_view name, u3
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{
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call_history.data.resize(call_history_max_size);
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}
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#ifdef __APPLE__
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pthread_jit_write_protect_np(true);
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#endif
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#ifdef ARCH_ARM64
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// Flush all cache lines after potentially writing executable code
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asm("ISB");
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asm("DSB ISH");
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#endif
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}
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ppu_thread::thread_name_t::operator std::string() const
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@ -1974,6 +2096,8 @@ const auto ppu_stcx_accurate_tx = build_function_asm<u64(*)(u32 raddr, u64 rtime
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#endif
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c.ret();
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#else
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// Unimplemented should fail.
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c.brk(Imm(0x42));
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c.ret(a64::x30);
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#endif
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});
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@ -2552,6 +2676,9 @@ extern void ppu_precompile(std::vector<std::string>& dir_queue, std::vector<lv2_
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named_thread_group workers("SPRX Worker ", std::min<u32>(utils::get_thread_count(), ::size32(file_queue)), [&]
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{
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#ifdef __APPLE__
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pthread_jit_write_protect_np(false);
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#endif
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// Set low priority
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thread_ctrl::scoped_priority low_prio(-1);
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@ -3226,6 +3353,9 @@ bool ppu_initialize(const ppu_module& info, bool check_only)
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// Set low priority
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thread_ctrl::scoped_priority low_prio(-1);
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#ifdef __APPLE__
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pthread_jit_write_protect_np(false);
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#endif
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for (u32 i = work_cv++; i < workload.size(); i = work_cv++, g_progr_pdone++)
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{
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if (Emu.IsStopped())
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@ -3287,6 +3417,9 @@ bool ppu_initialize(const ppu_module& info, bool check_only)
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}
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// Jit can be null if the loop doesn't ever enter.
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#ifdef __APPLE__
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pthread_jit_write_protect_np(false);
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#endif
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if (jit && !jit_mod.init)
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{
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jit->fin();
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@ -3345,7 +3478,12 @@ static void ppu_initialize2(jit_compiler& jit, const ppu_module& module_part, co
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std::unique_ptr<Module> _module = std::make_unique<Module>(obj_name, jit.get_context());
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// Initialize target
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#if defined(__APPLE__) && defined(ARCH_ARM64)
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// Force target linux on macOS arm64 to bypass some 64-bit address space linking issues
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_module->setTargetTriple(utils::c_llvm_default_triple);
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#else
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_module->setTargetTriple(Triple::normalize(sys::getProcessTriple()));
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#endif
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_module->setDataLayout(jit.get_engine().getTargetMachine()->createDataLayout());
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// Initialize translator
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