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gpu: add 8 gfx indirect rings
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parent
2432a5cc74
commit
6a2507c777
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@ -127,6 +127,8 @@ bool ComputePipe::processRing(Ring &ring) {
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ring.rptr = ring.base + *ring.rptrReportLocation;
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}
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auto origRptr = ring.rptr;
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while (ring.rptr != ring.wptr) {
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if (ring.rptr >= ring.base + ring.size) {
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ring.rptr = ring.base;
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@ -167,7 +169,7 @@ bool ComputePipe::processRing(Ring &ring) {
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rx::die("unexpected pm4 packet type %u", type);
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}
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if (ring.rptrReportLocation != nullptr) {
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if (origRptr != ring.rptr && ring.rptrReportLocation != nullptr) {
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*ring.rptrReportLocation = ring.rptr - ring.base;
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}
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@ -619,10 +621,31 @@ bool GraphicsPipe::processAllRings() {
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if (ring.rptr != ring.wptr) {
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allProcessed = false;
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for (auto &delayedRing : delayedRings) {
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if (delayedRing.rptr != delayedRing.wptr) {
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continue;
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}
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delayedRing = ring;
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ring.rptr = ring.wptr;
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break;
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}
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break;
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}
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}
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if (allProcessed) {
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for (auto &ring : delayedRings) {
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if (ring.rptr == ring.wptr) {
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continue;
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}
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processRing(ring);
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}
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}
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return allProcessed;
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}
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@ -103,6 +103,8 @@ struct GraphicsPipe {
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Registers::Context context;
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Registers::UConfig uConfig;
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Ring delayedRings[8];
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Ring deQueues[3];
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Ring ceQueue;
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@ -147,7 +147,7 @@ static orbis::ErrorCode gc_ioctl(orbis::File *file, std::uint64_t request,
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case 0xc0048116: { // submit done?
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if (auto gpu = amdgpu::DeviceCtl{orbis::g_context.gpuDevice}) {
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gpu.waitForIdle();
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// gpu.waitForIdle();
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} else {
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return orbis::ErrorCode::BUSY;
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}
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