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Initial Linux Aarch64 support
* Update asmjit dependency (aarch64 branch) * Disable USE_DISCORD_RPC by default * Dump some JIT objects in rpcs3 cache dir * Add SIGILL handler for all platforms * Fix resetting zeroing denormals in thread pool * Refactor most v128:: utils into global gv_** functions * Refactor PPU interpreter (incomplete), remove "precise" * - Instruction specializations with multiple accuracy flags * - Adjust calling convention for speed * - Removed precise/fast setting, replaced with static * - Started refactoring interpreters for building at runtime JIT * (I got tired of poor compiler optimizations) * - Expose some accuracy settings (SAT, NJ, VNAN, FPCC) * - Add exec_bytes PPU thread variable (akin to cycle count) * PPU LLVM: fix VCTUXS+VCTSXS instruction NaN results * SPU interpreter: remove "precise" for now (extremely non-portable) * - As with PPU, settings changed to static/dynamic for interpreters. * - Precise options will be implemented later * Fix termination after fatal error dialog
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89 changed files with 20360 additions and 5612 deletions
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@ -684,7 +684,7 @@ namespace vm
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// 1. To simplify range_lock logic
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// 2. To make sure it never overlaps with 32-bit addresses
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// Also check that it's aligned (lowest 16 bits)
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ensure((shm_self & 0xffff'8000'0000'ffff) == range_locked);
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ensure((shm_self & 0xffff'0000'0000'ffff) == range_locked);
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// Find another mirror and map it as shareable too
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for (auto& ploc : g_locations)
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@ -714,7 +714,7 @@ namespace vm
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u64 shm_self = reinterpret_cast<u64>(shm->get()) ^ range_locked;
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// Check (see above)
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ensure((shm_self & 0xffff'8000'0000'ffff) == range_locked);
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ensure((shm_self & 0xffff'0000'0000'ffff) == range_locked);
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// Map range as shareable
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for (u32 i = addr / 65536; i < addr / 65536 + size / 65536; i++)
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@ -1129,13 +1129,16 @@ namespace vm
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{
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auto fill64 = [](u8* ptr, u64 data, usz count)
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{
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#ifdef _MSC_VER
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#ifdef _M_X64
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__stosq(reinterpret_cast<u64*>(ptr), data, count);
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#else
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#elif defined(ARCH_X64)
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__asm__ ("mov %0, %%rdi; mov %1, %%rax; mov %2, %%rcx; rep stosq;"
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:
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: "r" (ptr), "r" (data), "r" (count)
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: "rdi", "rax", "rcx", "memory");
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#else
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for (usz i = 0; i < count; i++)
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reinterpret_cast<u64*>(ptr)[i] = data;
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#endif
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};
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@ -200,16 +200,10 @@ namespace vm
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return {};
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}
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// Unsafe convert host ptr to PS3 VM address (clamp with 4GiB alignment assumption)
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inline vm::addr_t get_addr(const void* ptr)
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{
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const auto [addr, ok] = try_get_addr(ptr);
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if (!ok)
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{
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fmt::throw_exception("Not a virtual memory pointer (%p)", ptr);
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}
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return addr;
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return vm::addr_t{static_cast<u32>(uptr(ptr))};
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}
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template<typename T>
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@ -3,6 +3,7 @@
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#include "vm.h"
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#include "vm_locking.h"
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#include "util/atomic.hpp"
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#include "util/tsc.hpp"
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#include <functional>
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extern bool g_use_rtm;
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@ -11,7 +12,6 @@ extern u64 g_rtm_tx_limit2;
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#ifdef _MSC_VER
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extern "C"
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{
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u64 __rdtsc();
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u32 _xbegin();
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void _xend();
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}
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@ -19,15 +19,6 @@ extern "C"
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namespace vm
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{
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inline u64 get_tsc()
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{
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#ifdef _MSC_VER
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return __rdtsc();
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#else
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return __builtin_ia32_rdtsc();
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#endif
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}
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enum : u64
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{
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rsrv_lock_mask = 127,
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@ -108,13 +99,14 @@ namespace vm
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auto& res = vm::reservation_acquire(addr);
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//_m_prefetchw(&res);
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#if defined(ARCH_X64)
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if (g_use_rtm)
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{
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// Stage 1: single optimistic transaction attempt
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unsigned status = -1;
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u64 _old = 0;
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auto stamp0 = get_tsc(), stamp1 = stamp0, stamp2 = stamp0;
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auto stamp0 = utils::get_tsc(), stamp1 = stamp0, stamp2 = stamp0;
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#ifndef _MSC_VER
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__asm__ goto ("xbegin %l[stage2];" ::: "memory" : stage2);
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@ -176,16 +168,16 @@ namespace vm
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#ifndef _MSC_VER
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__asm__ volatile ("mov %%eax, %0;" : "=r" (status) :: "memory");
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#endif
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stamp1 = get_tsc();
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stamp1 = utils::get_tsc();
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// Stage 2: try to lock reservation first
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_old = res.fetch_add(1);
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// Compute stamps excluding memory touch
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stamp2 = get_tsc() - (stamp1 - stamp0);
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stamp2 = utils::get_tsc() - (stamp1 - stamp0);
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// Start lightened transaction
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for (; !(_old & vm::rsrv_unique_lock) && stamp2 - stamp0 <= g_rtm_tx_limit2; stamp2 = get_tsc())
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for (; !(_old & vm::rsrv_unique_lock) && stamp2 - stamp0 <= g_rtm_tx_limit2; stamp2 = utils::get_tsc())
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{
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if (cpu.has_pause_flag())
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{
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@ -285,6 +277,9 @@ namespace vm
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return result;
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}
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}
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#else
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static_cast<void>(cpu);
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#endif /* ARCH_X64 */
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// Lock reservation and perform heavyweight lock
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reservation_shared_lock_internal(res);
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