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Initial Linux Aarch64 support

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* Update asmjit dependency (aarch64 branch)
* Disable USE_DISCORD_RPC by default
* Dump some JIT objects in rpcs3 cache dir
* Add SIGILL handler for all platforms
* Fix resetting zeroing denormals in thread pool
* Refactor most v128:: utils into global gv_** functions
* Refactor PPU interpreter (incomplete), remove "precise"
* - Instruction specializations with multiple accuracy flags
* - Adjust calling convention for speed
* - Removed precise/fast setting, replaced with static
* - Started refactoring interpreters for building at runtime JIT
*   (I got tired of poor compiler optimizations)
* - Expose some accuracy settings (SAT, NJ, VNAN, FPCC)
* - Add exec_bytes PPU thread variable (akin to cycle count)
* PPU LLVM: fix VCTUXS+VCTSXS instruction NaN results
* SPU interpreter: remove "precise" for now (extremely non-portable)
* - As with PPU, settings changed to static/dynamic for interpreters.
* - Precise options will be implemented later
* Fix termination after fatal error dialog
This commit is contained in:
Nekotekina 2021-12-30 19:39:18 +03:00
parent d6aa834b5f
commit 580bd2b25e
89 changed files with 20360 additions and 5612 deletions
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6
rpcs3/Crypto/aes.cpp
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@ -461,8 +461,10 @@ int aes_setkey_enc( aes_context *ctx, const unsigned char *key, unsigned int key
ctx->rk = RK = ctx->buf;
#if defined(__SSE2__) || defined(_M_X64)
if( aesni_supports( POLARSSL_AESNI_AES ) )
return( aesni_setkey_enc( reinterpret_cast<unsigned char*>(ctx->rk), key, keysize ) );
#endif
for( i = 0; i < (keysize >> 5); i++ )
{
@ -564,12 +566,14 @@ int aes_setkey_dec( aes_context *ctx, const unsigned char *key, unsigned int key
if( ret != 0 )
return( ret );
#if defined(__SSE2__) || defined(_M_X64)
if( aesni_supports( POLARSSL_AESNI_AES ) )
{
aesni_inverse_key( reinterpret_cast<unsigned char*>(ctx->rk),
reinterpret_cast<const unsigned char*>(cty.rk), ctx->nr );
goto done;
}
#endif
SK = cty.rk + cty.nr * 4;
@ -658,8 +662,10 @@ int aes_crypt_ecb( aes_context *ctx,
int i;
uint32_t *RK, X0, X1, X2, X3, Y0, Y1, Y2, Y3;
#if defined(__SSE2__) || defined(_M_X64)
if( aesni_supports( POLARSSL_AESNI_AES ) )
return( aesni_crypt_ecb( ctx, mode, input, output ) );
#endif
RK = ctx->rk;