mirror of
https://github.com/RPCSX/rpcsx.git
synced 2026-01-07 01:00:06 +01:00
rpcsx-gpu: make shaderNonSemanticInfo optional
This commit is contained in:
DH
parent
e2c7b0fe2d
commit
54afa1938c
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@ -607,9 +607,9 @@ struct CachedImage : Cache::Entry {
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for (unsigned mipLevel = 0; mipLevel < image.getMipLevels(); ++mipLevel) {
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auto ®ionInfo = info.getSubresourceInfo(mipLevel);
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tiler.tile(scheduler, info, acquiredTileMode, acquiredDfmt,
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transferBuffer.getAddress() + linearOffset, linearSize - linearOffset,
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tiledBuffer.deviceAddress, tiledSize, mipLevel, 0,
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image.getArrayLayers());
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transferBuffer.getAddress() + linearOffset,
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linearSize - linearOffset, tiledBuffer.deviceAddress,
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tiledSize, mipLevel, 0, image.getArrayLayers());
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linearOffset += regionInfo.linearSize * image.getArrayLayers();
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}
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@ -690,9 +690,15 @@ Cache::Shader Cache::Tag::getShader(const ShaderKey &key,
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std::optional<gcn::ConvertedShader> converted;
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{
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auto env = key.env;
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env.supportsBarycentric = vk::context->supportsBarycentric;
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env.supportsInt8 = vk::context->supportsInt8;
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env.supportsInt64Atomics = vk::context->supportsInt64Atomics;
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env.supportsNonSemanticInfo = vk::context->supportsNonSemanticInfo;
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gcn::Context context;
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auto deserialized = gcn::deserialize(
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context, key.env, mParent->mDevice->gcnSemantic, key.address,
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context, env, mParent->mDevice->gcnSemantic, key.address,
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[vmId](std::uint64_t address) -> std::uint32_t {
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return *RemoteMemory{vmId}.getPointer<std::uint32_t>(address);
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});
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@ -701,7 +707,7 @@ Cache::Shader Cache::Tag::getShader(const ShaderKey &key,
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converted = gcn::convertToSpv(context, deserialized,
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mParent->mDevice->gcnSemanticModuleInfo,
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key.stage, key.env);
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key.stage, env);
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if (!converted) {
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return {};
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}
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@ -1091,15 +1097,15 @@ Cache::Image Cache::Tag::getImage(const ImageKey &key, Access access) {
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VK_IMAGE_USAGE_TRANSFER_DST_BIT | VK_IMAGE_USAGE_TRANSFER_SRC_BIT;
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if (key.kind == ImageKind::Color) {
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usage |= VK_IMAGE_USAGE_SAMPLED_BIT;
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bool isCompressed =
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key.dfmt == gnm::kDataFormatBc1 || key.dfmt == gnm::kDataFormatBc2 ||
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key.dfmt == gnm::kDataFormatBc3 || key.dfmt == gnm::kDataFormatBc4 ||
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key.dfmt == gnm::kDataFormatBc5 || key.dfmt == gnm::kDataFormatBc6 ||
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key.dfmt == gnm::kDataFormatBc7 || key.dfmt == gnm::kDataFormatGB_GR ||
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key.dfmt == gnm::kDataFormatBG_RG;
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bool isCompressed =
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key.dfmt == gnm::kDataFormatBc1 || key.dfmt == gnm::kDataFormatBc2 ||
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key.dfmt == gnm::kDataFormatBc3 || key.dfmt == gnm::kDataFormatBc4 ||
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key.dfmt == gnm::kDataFormatBc5 || key.dfmt == gnm::kDataFormatBc6 ||
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key.dfmt == gnm::kDataFormatBc7 || key.dfmt == gnm::kDataFormatGB_GR ||
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key.dfmt == gnm::kDataFormatBG_RG;
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if (!isCompressed) {
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usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
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if (!isCompressed) {
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usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
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}
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} else {
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usage |= VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT;
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@ -1201,8 +1207,8 @@ Cache::Image Cache::Tag::getImage(const ImageKey &key, Access access) {
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auto &info = surfaceInfo.getSubresourceInfo(mipLevel);
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tiler.detile(*mScheduler, surfaceInfo, key.tileMode, key.dfmt,
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tiledBuffer.deviceAddress, surfaceInfo.totalSize, dstAddress, detiledSize, mipLevel, 0,
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key.arrayLayerCount);
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tiledBuffer.deviceAddress, surfaceInfo.totalSize,
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dstAddress, detiledSize, mipLevel, 0, key.arrayLayerCount);
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detiledSize -= info.linearSize * key.arrayLayerCount;
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dstAddress += info.linearSize * key.arrayLayerCount;
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@ -1420,9 +1426,6 @@ Cache::GraphicsTag::getShader(gcn::Stage stage, const SpiShaderPgm &pgm,
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gcn::Environment env{
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.vgprCount = pgm.rsrc1.getVGprCount(),
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.sgprCount = pgm.rsrc1.getSGprCount(),
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.supportsBarycentric = vk::context->supportsBarycentric,
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.supportsInt8 = vk::context->supportsInt8,
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.supportsInt64Atomics = vk::context->supportsInt64Atomics,
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.userSgprs = std::span(pgm.userData.data(), pgm.rsrc2.userSgpr),
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};
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@ -1572,9 +1575,6 @@ Cache::ComputeTag::getShader(const Registers::ComputeConfig &pgm) {
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.numThreadX = static_cast<std::uint8_t>(pgm.numThreadX),
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.numThreadY = static_cast<std::uint8_t>(pgm.numThreadY),
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.numThreadZ = static_cast<std::uint8_t>(pgm.numThreadZ),
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.supportsBarycentric = vk::context->supportsBarycentric,
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.supportsInt8 = vk::context->supportsInt8,
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.supportsInt64Atomics = vk::context->supportsInt64Atomics,
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.userSgprs = std::span(pgm.userData.data(), pgm.rsrc2.userSgpr),
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};
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@ -1610,23 +1610,28 @@ Cache::ComputeTag::getShader(const Registers::ComputeConfig &pgm) {
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std::uint32_t sgprInputCount = 0;
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if (pgm.rsrc2.tgIdXEn) {
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sgprInput[sgprInputCount++] = static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupIdX);
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sgprInput[sgprInputCount++] =
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static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupIdX);
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}
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if (pgm.rsrc2.tgIdYEn) {
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sgprInput[sgprInputCount++] = static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupIdY);
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sgprInput[sgprInputCount++] =
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static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupIdY);
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}
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if (pgm.rsrc2.tgIdZEn) {
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sgprInput[sgprInputCount++] = static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupIdZ);
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sgprInput[sgprInputCount++] =
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static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupIdZ);
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}
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if (pgm.rsrc2.tgSizeEn) {
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sgprInput[sgprInputCount++] = static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupSize);
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sgprInput[sgprInputCount++] =
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static_cast<std::uint32_t>(gcn::CsSGprInput::ThreadGroupSize);
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}
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if (pgm.rsrc2.scratchEn) {
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sgprInput[sgprInputCount++] = static_cast<std::uint32_t>(gcn::CsSGprInput::Scratch);
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sgprInput[sgprInputCount++] =
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static_cast<std::uint32_t>(gcn::CsSGprInput::Scratch);
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}
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for (std::size_t index = 0; const auto &slot : configSlots) {
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@ -11,7 +11,10 @@
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#extension GL_EXT_null_initializer : enable
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#extension GL_EXT_buffer_reference2 : enable
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#extension GL_EXT_buffer_reference_uvec2 : enable
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#ifdef DEBUG
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#extension GL_EXT_debug_printf : enable
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#endif
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#include "tiler.glsl"
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@ -54,6 +57,7 @@ void main() {
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uint32_t bpp = (config.bitsPerElement + 7) / 8;
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#ifdef DEBUG
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if (config.srcAddress + tiledByteOffset + bpp > config.srcEndAddress) {
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debugPrintfEXT("detiler2d: out of src buffer %d x %d x %d", pos.x, pos.y, pos.z);
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return;
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@ -63,6 +67,7 @@ void main() {
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debugPrintfEXT("detiler2d: out of dst buffer %d x %d x %d", pos.x, pos.y, pos.z);
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return;
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}
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#endif
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switch (bpp) {
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case 1:
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@ -11,7 +11,10 @@
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#extension GL_EXT_null_initializer : enable
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#extension GL_EXT_buffer_reference2 : enable
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#extension GL_EXT_buffer_reference_uvec2 : enable
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#ifdef DEBUG
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#extension GL_EXT_debug_printf : enable
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#endif
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#include "tiler.glsl"
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@ -47,6 +50,7 @@ void main() {
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uint32_t bpp = (config.bitsPerElement + 7) / 8;
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#ifdef DEBUG
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if (config.srcAddress + linearByteOffset + bpp > config.srcEndAddress) {
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debugPrintfEXT("tiler1d: out of src buffer %d x %d x %d", pos.x, pos.y, pos.z);
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return;
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@ -56,6 +60,7 @@ void main() {
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debugPrintfEXT("tiler1d: out of dst buffer %d x %d x %d", pos.x, pos.y, pos.z);
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return;
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}
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#endif
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switch (bpp) {
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case 1:
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@ -11,7 +11,10 @@
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#extension GL_EXT_null_initializer : enable
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#extension GL_EXT_buffer_reference2 : enable
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#extension GL_EXT_buffer_reference_uvec2 : enable
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#ifdef DEBUG
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#extension GL_EXT_debug_printf : enable
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#endif
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#include "tiler.glsl"
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@ -53,6 +56,7 @@ void main() {
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uint32_t bpp = (config.bitsPerElement + 7) / 8;
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#ifdef DEBUG
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if (config.srcAddress + linearByteOffset + bpp > config.srcEndAddress) {
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debugPrintfEXT("tiler2d: out of src buffer %d x %d x %d", pos.x, pos.y, pos.z);
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return;
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@ -62,6 +66,7 @@ void main() {
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debugPrintfEXT("tiler2d: out of dst buffer %d x %d x %d", pos.x, pos.y, pos.z);
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return;
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}
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#endif
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switch (bpp) {
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case 1:
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@ -119,6 +119,7 @@ struct Environment {
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bool supportsBarycentric = true;
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bool supportsInt8 = false;
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bool supportsInt64Atomics = false;
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bool supportsNonSemanticInfo = false;
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std::span<const std::uint32_t> userSgprs;
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};
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@ -226,7 +226,6 @@ struct ResourcesBuilder {
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auto cloned = ir::clone(inst, resources.context, importer);
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if (inst == ir::spv::OpLoad) {
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auto load = inst.staticCast<ir::Value>();
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auto def = memorySSA.getDef(inst, inst.getOperand(1).getAsValue());
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auto resourceInst = unpackResourceDef(memorySSA, importer, def);
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@ -444,7 +443,6 @@ ir::Value GcnConverter::getGlPosition(gcn::Builder &builder) {
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ir::spv::StorageClass::Output,
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gcnContext.getTypeVector(gcnContext.getTypeFloat32(), 4));
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auto index = gcnContext.simm32(0);
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return builder.createSpvAccessChain(gcnContext.getUnknownLocation(),
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float4OutPtrT, gcnContext.perVertex,
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{{gcnContext.simm32(0)}});
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@ -572,9 +570,7 @@ static void replaceVariableWithConstant(ir::Value variable,
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}
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}
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static void expToSpv(GcnConverter &converter, gcn::Import &importer,
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gcn::Stage stage,
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const SemanticModuleInfo &semanticModuleInfo,
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static void expToSpv(GcnConverter &converter, gcn::Stage stage,
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gcn::ShaderInfo &info, ir::Instruction inst) {
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enum Target : unsigned {
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ET_MRT0 = 0,
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@ -832,10 +828,8 @@ static void instructionsToSpv(GcnConverter &converter, gcn::Import &importer,
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.createSpvExtInstImport(context.getUnknownLocation(), "GLSL.std.450");
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auto boolT = context.getTypeBool();
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auto f32T = context.getTypeFloat32();
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auto u32T = context.getTypeUInt32();
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auto s32T = context.getTypeSInt32();
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auto f32x3 = context.getTypeVector(f32T, 3);
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auto f32x4 = context.getTypeVector(f32T, 4);
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auto s32PT = context.getTypePointer(ir::spv::StorageClass::Input, s32T);
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auto f32x3PT = context.getTypePointer(ir::spv::StorageClass::Input, f32x3);
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@ -876,7 +870,7 @@ static void instructionsToSpv(GcnConverter &converter, gcn::Import &importer,
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}
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if (inst == ir::exp::EXP) {
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expToSpv(converter, importer, stage, semanticModuleInfo, info, inst);
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expToSpv(converter, stage, info, inst);
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inst.remove();
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continue;
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}
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@ -1696,8 +1690,11 @@ gcn::convertToSpv(Context &context, ir::Region body,
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extensions.createSpvExtension(context.getUnknownLocation(),
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"SPV_KHR_physical_storage_buffer");
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extensions.createSpvExtension(context.getUnknownLocation(),
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"SPV_KHR_non_semantic_info");
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if (env.supportsNonSemanticInfo) {
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extensions.createSpvExtension(context.getUnknownLocation(),
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"SPV_KHR_non_semantic_info");
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}
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auto merged = context.layout.merge(context);
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result.spv = spv::serialize(merged);
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@ -93,7 +93,6 @@ static GcnOperand createSgprGcnOperand(std::uint64_t &address, unsigned id) {
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static void
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readVop2Inst(GcnInstruction &inst, std::uint64_t &address,
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const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
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constexpr int kMinInstSize = 1;
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constexpr auto src0Mask = genMask(0, 9);
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constexpr auto vsrc1Mask = genMask(getMaskEnd(src0Mask), 8);
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constexpr auto vdstMask = genMask(getMaskEnd(vsrc1Mask), 8);
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@ -133,7 +132,6 @@ readVop2Inst(GcnInstruction &inst, std::uint64_t &address,
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static void
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readSop2Inst(GcnInstruction &inst, std::uint64_t &address,
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const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
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constexpr int kMinInstSize = 1;
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constexpr auto ssrc0Mask = genMask(0, 8);
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constexpr auto ssrc1Mask = genMask(getMaskEnd(ssrc0Mask), 8);
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constexpr auto sdstMask = genMask(getMaskEnd(ssrc1Mask), 7);
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@ -156,7 +154,6 @@ readSop2Inst(GcnInstruction &inst, std::uint64_t &address,
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static void
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readSopkInst(GcnInstruction &inst, std::uint64_t &address,
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const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
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constexpr int kMinInstSize = 1;
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constexpr auto simmMask = genMask(0, 16);
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constexpr auto sdstMask = genMask(getMaskEnd(simmMask), 7);
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constexpr auto opMask = genMask(getMaskEnd(sdstMask), 5);
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@ -180,7 +177,6 @@ readSopkInst(GcnInstruction &inst, std::uint64_t &address,
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static void
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readSmrdInst(GcnInstruction &inst, std::uint64_t &address,
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const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
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constexpr int kMinInstSize = 1;
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constexpr auto offsetMask = genMask(0, 8);
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constexpr auto immMask = genMask(getMaskEnd(offsetMask), 1);
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constexpr auto sbaseMask = genMask(getMaskEnd(immMask), 6);
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@ -214,9 +210,9 @@ readSmrdInst(GcnInstruction &inst, std::uint64_t &address,
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if (op != ir::smrd::MEMTIME) {
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auto baseOperand = createSgprGcnOperand(address, sbase);
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auto offsetOperand =
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imm ? GcnOperand::createConstant(std::uint32_t(std::int8_t(offset << 2)))
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: createSgprGcnOperand(address, offset).withR();
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auto offsetOperand = imm ? GcnOperand::createConstant(
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std::uint32_t(std::int8_t(offset << 2)))
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: createSgprGcnOperand(address, offset).withR();
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if (isBuffer) {
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inst.addOperand(GcnOperand::createBuffer(baseOperand).withR());
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@ -235,13 +231,9 @@ readSmrdInst(GcnInstruction &inst, std::uint64_t &address,
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static void
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readVop3Inst(GcnInstruction &inst, std::uint64_t &address,
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const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
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constexpr int kMinInstSize = 2;
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constexpr auto vdstMask = genMask(0, 8);
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constexpr auto absMask = genMask(getMaskEnd(vdstMask), 3);
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constexpr auto abs0Mask = genMask(getMaskEnd(vdstMask), 1);
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constexpr auto abs1Mask = genMask(getMaskEnd(abs0Mask), 1);
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constexpr auto abs2Mask = genMask(getMaskEnd(abs1Mask), 1);
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constexpr auto clmpMask = genMask(getMaskEnd(absMask), 1);
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constexpr auto sdstMask = genMask(getMaskEnd(vdstMask), 7);
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@ -253,9 +245,6 @@ readVop3Inst(GcnInstruction &inst, std::uint64_t &address,
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constexpr auto src2Mask = genMask(getMaskEnd(src1Mask), 9);
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constexpr auto omodMask = genMask(getMaskEnd(src2Mask), 2);
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constexpr auto negMask = genMask(getMaskEnd(omodMask), 3);
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constexpr auto neg0Mask = genMask(getMaskEnd(omodMask), 1);
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constexpr auto neg1Mask = genMask(getMaskEnd(neg0Mask), 1);
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constexpr auto neg2Mask = genMask(getMaskEnd(neg1Mask), 1);
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std::uint32_t words[2];
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words[0] = readMemory(address);
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@ -308,7 +297,8 @@ readVop3Inst(GcnInstruction &inst, std::uint64_t &address,
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op == ir::vop3::DIV_SCALE_F64;
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bool readsVcc = op == ir::vop3::DIV_FMAS_F32 || op == ir::vop3::DIV_FMAS_F64;
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bool usesSrc2 = op >= ir::vop3::MAD_LEGACY_F32 && op <= ir::vop3::DIV_FIXUP_F64;
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bool usesSrc2 =
|
||||
op >= ir::vop3::MAD_LEGACY_F32 && op <= ir::vop3::DIV_FIXUP_F64;
|
||||
|
||||
if (writesVcc) {
|
||||
inst.addOperand(GcnOperand::createVccLo().withRW());
|
||||
|
|
@ -366,7 +356,6 @@ readVop3Inst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readMubufInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 2;
|
||||
constexpr auto offsetMask = genMask(0, 12);
|
||||
constexpr auto offenMask = genMask(getMaskEnd(offsetMask), 1);
|
||||
constexpr auto idxenMask = genMask(getMaskEnd(offenMask), 1);
|
||||
|
|
@ -465,8 +454,6 @@ readMubufInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readMtbufInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 2;
|
||||
|
||||
constexpr auto offsetMask = genMask(0, 12);
|
||||
constexpr auto offenMask = genMask(getMaskEnd(offsetMask), 1);
|
||||
constexpr auto idxenMask = genMask(getMaskEnd(offenMask), 1);
|
||||
|
|
@ -554,8 +541,6 @@ readMtbufInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readMimgInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 2;
|
||||
|
||||
constexpr auto dmaskMask = genMask(8, 4);
|
||||
constexpr auto unrmMask = genMask(getMaskEnd(dmaskMask), 1);
|
||||
constexpr auto glcMask = genMask(getMaskEnd(unrmMask), 1);
|
||||
|
|
@ -638,7 +623,6 @@ readMimgInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readDsInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 2;
|
||||
constexpr auto offset0Mask = genMask(0, 8);
|
||||
constexpr auto offset1Mask = genMask(getMaskEnd(offset0Mask), 8);
|
||||
constexpr auto gdsMask = genMask(getMaskEnd(offset1Mask) + 1, 1);
|
||||
|
|
@ -713,7 +697,6 @@ readDsInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readVintrpInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 1;
|
||||
constexpr auto vsrcMask = genMask(0, 8);
|
||||
constexpr auto attrChanMask = genMask(getMaskEnd(vsrcMask), 2);
|
||||
constexpr auto attrMask = genMask(getMaskEnd(attrChanMask), 6);
|
||||
|
|
@ -743,8 +726,6 @@ readVintrpInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readExpInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 2;
|
||||
|
||||
constexpr auto enMask = genMask(0, 4);
|
||||
constexpr auto targetMask = genMask(getMaskEnd(enMask), 6);
|
||||
constexpr auto comprMask = genMask(getMaskEnd(targetMask), 1);
|
||||
|
|
@ -797,8 +778,6 @@ readExpInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readVop1Inst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 1;
|
||||
|
||||
constexpr auto src0Mask = genMask(0, 9);
|
||||
constexpr auto opMask = genMask(getMaskEnd(src0Mask), 8);
|
||||
constexpr auto vdstMask = genMask(getMaskEnd(opMask), 8);
|
||||
|
|
@ -818,7 +797,6 @@ readVop1Inst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readVopcInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 1;
|
||||
constexpr auto src0Mask = genMask(0, 9);
|
||||
constexpr auto vsrc1Mask = genMask(getMaskEnd(src0Mask), 8);
|
||||
constexpr auto opMask = genMask(getMaskEnd(vsrc1Mask), 8);
|
||||
|
|
@ -840,8 +818,6 @@ readVopcInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readSop1Inst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 1;
|
||||
|
||||
constexpr auto ssrc0Mask = genMask(0, 8);
|
||||
constexpr auto opMask = genMask(getMaskEnd(ssrc0Mask), 8);
|
||||
constexpr auto sdstMask = genMask(getMaskEnd(opMask), 7);
|
||||
|
|
@ -857,8 +833,7 @@ readSop1Inst(GcnInstruction &inst, std::uint64_t &address,
|
|||
inst.op = op;
|
||||
|
||||
bool readsM0 = op == ir::sop1::MOVRELS_B32 || op == ir::sop1::MOVRELS_B64 ||
|
||||
op == ir::sop1::MOVRELD_B32 || op == ir::sop1::MOVRELD_B64 ||
|
||||
op == ir::sop1::ABS_I32;
|
||||
op == ir::sop1::MOVRELD_B32 || op == ir::sop1::MOVRELD_B64;
|
||||
|
||||
inst.addOperand(createSgprGcnOperand(address, sdst).withW());
|
||||
inst.addOperand(createSgprGcnOperand(address, ssrc0).withR());
|
||||
|
|
@ -870,8 +845,6 @@ readSop1Inst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readSopcInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
constexpr int kMinInstSize = 1;
|
||||
|
||||
constexpr auto ssrc0Mask = genMask(0, 8);
|
||||
constexpr auto ssrc1Mask = genMask(getMaskEnd(ssrc0Mask), 8);
|
||||
constexpr auto opMask = genMask(getMaskEnd(ssrc1Mask), 7);
|
||||
|
|
@ -892,8 +865,6 @@ readSopcInst(GcnInstruction &inst, std::uint64_t &address,
|
|||
static void
|
||||
readSoppInst(GcnInstruction &inst, std::uint64_t &address,
|
||||
const std::function<std::uint32_t(std::uint64_t)> &readMemory) {
|
||||
static constexpr int kMinInstSize = 1;
|
||||
|
||||
static constexpr auto simmMask = genMask(0, 16);
|
||||
static constexpr auto opMask = genMask(getMaskEnd(simmMask), 7);
|
||||
|
||||
|
|
@ -1030,7 +1001,7 @@ void GcnInstruction::print(std::ostream &os) const {
|
|||
if (operandCount > 0) {
|
||||
os << ' ';
|
||||
|
||||
for (int i = 0; i < operandCount; ++i) {
|
||||
for (std::size_t i = 0; i < operandCount; ++i) {
|
||||
if (i != 0) {
|
||||
os << ", ";
|
||||
}
|
||||
|
|
|
|||
|
|
@ -570,7 +570,6 @@ ir::Value spv::Context::createOutput(ir::Location loc, int index) {
|
|||
Builder::createAppend(*this, layout.getOrCreateGlobals(*this));
|
||||
auto annotations =
|
||||
Builder::createAppend(*this, layout.getOrCreateAnnotations(*this));
|
||||
auto debugs = Builder::createAppend(*this, layout.getOrCreateDebugs(*this));
|
||||
|
||||
auto variable = globals.createSpvVariable(loc, variableType,
|
||||
ir::spv::StorageClass::Output);
|
||||
|
|
@ -598,7 +597,6 @@ ir::Value spv::Context::createInput(ir::Location loc, int index) {
|
|||
Builder::createAppend(*this, layout.getOrCreateGlobals(*this));
|
||||
auto annotations =
|
||||
Builder::createAppend(*this, layout.getOrCreateAnnotations(*this));
|
||||
auto debugs = Builder::createAppend(*this, layout.getOrCreateDebugs(*this));
|
||||
|
||||
auto variable = globals.createSpvVariable(loc, variableType,
|
||||
ir::spv::StorageClass::Input);
|
||||
|
|
@ -630,7 +628,6 @@ ir::Value spv::Context::createAttr(ir::Location loc, int attrId, bool perVertex,
|
|||
Builder::createAppend(*this, layout.getOrCreateGlobals(*this));
|
||||
auto annotations =
|
||||
Builder::createAppend(*this, layout.getOrCreateAnnotations(*this));
|
||||
auto debugs = Builder::createAppend(*this, layout.getOrCreateDebugs(*this));
|
||||
|
||||
auto variable = globals.createSpvVariable(loc, variableType,
|
||||
ir::spv::StorageClass::Input);
|
||||
|
|
|
|||
|
|
@ -252,7 +252,6 @@ gcn::Context::getOrCreateLabel(ir::Location loc, ir::Region body,
|
|||
std::uint64_t address) {
|
||||
auto it = instructions.lower_bound(address);
|
||||
|
||||
bool exists = false;
|
||||
if (it != instructions.end() && it->first == address) {
|
||||
if (it->second == ir::spv::OpLabel) {
|
||||
return {it->second.staticCast<ir::Value>(), false};
|
||||
|
|
@ -408,7 +407,6 @@ ir::Value gcn::Context::getOrCreateRegisterVariable(gcn::RegId id) {
|
|||
auto pRegTxN = getTypePointer(storageClass, regT);
|
||||
|
||||
auto globals = Builder::createAppend(*this, layout.getOrCreateGlobals(*this));
|
||||
auto debugs = Builder::createAppend(*this, layout.getOrCreateDebugs(*this));
|
||||
|
||||
entity = globals.createSpvVariable(location, pRegTxN, storageClass);
|
||||
setName(entity, getRegisterName(id));
|
||||
|
|
@ -489,7 +487,6 @@ ir::Value gcn::Context::readReg(ir::Location loc, Builder &builder,
|
|||
}
|
||||
|
||||
int regCount = valWidth / regWidth;
|
||||
auto sint32 = getTypeSInt32();
|
||||
auto channelType = getTypeInt(regWidth, false);
|
||||
auto splittedType = regCount > 4 ? getTypeArray(channelType, imm32(regCount))
|
||||
: getTypeVector(channelType, regCount);
|
||||
|
|
@ -602,7 +599,6 @@ void gcn::Context::writeReg(ir::Location loc, Builder &builder, gcn::RegId id,
|
|||
|
||||
int regCount = valWidth / regWidth;
|
||||
|
||||
auto sint32 = getTypeSInt32();
|
||||
auto channelType = getTypeInt(regWidth, false);
|
||||
auto splittedType = regCount > 4 ? getTypeArray(channelType, imm32(regCount))
|
||||
: getTypeVector(channelType, regCount);
|
||||
|
|
@ -701,11 +697,9 @@ static ir::Value deserializeGcnRegion(
|
|||
const std::function<std::uint32_t(std::uint64_t)> &readMemory,
|
||||
std::vector<ir::Instruction> &branchesToUnknown,
|
||||
std::unordered_set<std::uint64_t> &processed) {
|
||||
BinaryLayout &resultLayout = converter.layout;
|
||||
AddressLocationBuilder locBuilder{&converter};
|
||||
|
||||
ir::Value boolTV = converter.getTypeBool();
|
||||
ir::Value float64TV = converter.getTypeFloat64();
|
||||
ir::Value float32TV = converter.getTypeFloat32();
|
||||
ir::Value uint16TV = converter.getTypeUInt16();
|
||||
ir::Value sint16TV = converter.getTypeSInt16();
|
||||
|
|
@ -800,7 +794,6 @@ static ir::Value deserializeGcnRegion(
|
|||
auto f32 = converter.getTypeFloat32();
|
||||
auto attrChannelPtrType =
|
||||
converter.getTypePointer(ir::spv::StorageClass::Input, f32);
|
||||
auto resultType = converter.getTypeArray(f32, converter.simm32(3));
|
||||
|
||||
auto attr =
|
||||
converter.createAttr(loc, op.attrId, environment.supportsBarycentric,
|
||||
|
|
@ -947,8 +940,8 @@ static ir::Value deserializeGcnRegion(
|
|||
case GcnOperand::Kind::LdsDirect:
|
||||
return converter.writeReg(loc, builder, gcn::RegId::LdsDirect, 0, value);
|
||||
case GcnOperand::Kind::Vgpr:
|
||||
return converter.writeReg(loc, builder, gcn::RegId::Vgpr, op.value,
|
||||
value);
|
||||
return converter.writeReg(loc, builder, gcn::RegId::Vgpr, op.value, value,
|
||||
lane);
|
||||
case GcnOperand::Kind::Sgpr:
|
||||
return converter.writeReg(loc, builder, gcn::RegId::Sgpr, op.value,
|
||||
value);
|
||||
|
|
@ -1281,7 +1274,7 @@ static ir::Value deserializeGcnRegion(
|
|||
auto inst = builder.createInstruction(loc, isaInst.kind, isaInst.op);
|
||||
auto paramBuilder = gcn::Builder::createInsertBefore(converter, inst);
|
||||
|
||||
for (std::size_t index = 0; auto &op : operands) {
|
||||
for (auto &op : operands) {
|
||||
inst.addOperand(createOperandRead(loc, paramBuilder, uint32TV, op));
|
||||
}
|
||||
|
||||
|
|
@ -1430,7 +1423,6 @@ static ir::Value deserializeGcnRegion(
|
|||
}
|
||||
|
||||
static void canonicalizeRegisterVariableType(ir::Context &context,
|
||||
const BinaryLayout &layout,
|
||||
gcn::RegId regId,
|
||||
ir::Value variable) {
|
||||
auto varPointerType = variable.getOperand(0).getAsValue();
|
||||
|
|
@ -1534,7 +1526,7 @@ void gcn::canonicalizeSemantic(ir::Context &context,
|
|||
auto &name = *entry.getOperand(1).getAsString();
|
||||
|
||||
if (auto regId = getRegIdByName(name)) {
|
||||
canonicalizeRegisterVariableType(context, layout, *regId, node);
|
||||
canonicalizeRegisterVariableType(context, *regId, node);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ struct Context {
|
|||
bool supportsBarycentric = false;
|
||||
bool supportsInt8 = false;
|
||||
bool supportsInt64Atomics = false;
|
||||
bool supportsNonSemanticInfo = false;
|
||||
|
||||
Context() = default;
|
||||
Context(const Context &) = delete;
|
||||
|
|
|
|||
|
|
@ -481,6 +481,11 @@ void vk::Context::createDevice(VkSurfaceKHR surface, int gpuIndex,
|
|||
}
|
||||
|
||||
for (auto ext : requiredExtensions) {
|
||||
if (ext ==
|
||||
std::string_view(VK_KHR_SHADER_NON_SEMANTIC_INFO_EXTENSION_NAME)) {
|
||||
supportsNonSemanticInfo = true;
|
||||
}
|
||||
|
||||
deviceExtensions.push_back(ext);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -337,9 +337,11 @@ int main(int argc, const char *argv[]) {
|
|||
VK_EXT_SHADER_OBJECT_EXTENSION_NAME,
|
||||
VK_KHR_SYNCHRONIZATION_2_EXTENSION_NAME,
|
||||
VK_KHR_DYNAMIC_RENDERING_EXTENSION_NAME,
|
||||
VK_KHR_SHADER_NON_SEMANTIC_INFO_EXTENSION_NAME,
|
||||
},
|
||||
{VK_KHR_FRAGMENT_SHADER_BARYCENTRIC_EXTENSION_NAME});
|
||||
{
|
||||
VK_KHR_FRAGMENT_SHADER_BARYCENTRIC_EXTENSION_NAME,
|
||||
VK_KHR_SHADER_NON_SEMANTIC_INFO_EXTENSION_NAME,
|
||||
});
|
||||
|
||||
auto getTotalMemorySize = [&](int memoryType) -> VkDeviceSize {
|
||||
auto deviceLocalMemoryType =
|
||||
|
|
|
|||
Loading…
Reference in a new issue