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gpu: compute: stub acquire mem
bugfixes
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parent
7a7f317ce8
commit
524e9730e2
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@ -96,6 +96,7 @@ ComputePipe::ComputePipe(int index)
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commandHandlers[gnm::IT_WAIT_REG_MEM] = &ComputePipe::waitRegMem;
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commandHandlers[gnm::IT_WRITE_DATA] = &ComputePipe::writeData;
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commandHandlers[gnm::IT_INDIRECT_BUFFER] = &ComputePipe::indirectBuffer;
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commandHandlers[gnm::IT_ACQUIRE_MEM] = &ComputePipe::acquireMem;
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}
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bool ComputePipe::processAllRings() {
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@ -169,6 +170,8 @@ bool ComputePipe::processRing(Ring &ring) {
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if (ring.rptrReportLocation != nullptr) {
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*ring.rptrReportLocation = ring.rptr - ring.base;
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}
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break;
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}
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return true;
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@ -197,8 +200,8 @@ void ComputePipe::mapQueue(int queueId, Ring ring,
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waitForIdle(queueId, lock);
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}
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std::println("mapQueue: {}, {}, {}", (void *)ring.base, (void *)ring.wptr,
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ring.size);
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std::println("mapQueue: {}, {}, {}, {}", (void *)ring.base, (void *)ring.wptr,
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ring.size, (void *)ring.doorbell);
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queues[1 - ring.indirectLevel][queueId] = ring;
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}
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@ -414,15 +417,17 @@ bool ComputePipe::indirectBuffer(Ring &ring) {
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auto ibSize = ring.rptr[3] & ((1 << 20) - 1);
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auto address = addressLo | (static_cast<std::uint64_t>(addressHi) << 32);
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if (ring.indirectLevel != 0) {
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vmId = ring.vmId;
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}
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vmId = ring.vmId;
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auto rptr = RemoteMemory{vmId}.getPointer<std::uint32_t>(address);
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setIndirectRing(currentQueueId, ring.indirectLevel + 1,
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Ring::createFromRange(vmId, rptr, ibSize));
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auto indirectRing = Ring::createFromRange(vmId, rptr, ibSize);
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indirectRing.doorbell = ring.doorbell;
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setIndirectRing(currentQueueId, ring.indirectLevel + 1, indirectRing);
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return true;
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}
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bool ComputePipe::acquireMem(Ring &ring) { return true; }
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bool ComputePipe::unknownPacket(Ring &ring) {
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auto op = rx::getBits(ring.rptr[0], 15, 8);
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@ -66,6 +66,7 @@ struct ComputePipe {
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bool waitRegMem(Ring &ring);
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bool writeData(Ring &ring);
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bool indirectBuffer(Ring &ring);
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bool acquireMem(Ring &ring);
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bool unknownPacket(Ring &ring);
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bool handleNop(Ring &ring);
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