mirror of
https://github.com/RPCSX/rpcsx.git
synced 2026-04-06 15:05:59 +00:00
gpu2: move shader resource management to cache
fixed descriptor set binding fixed 5_6_5 format swizzling fix rect calculation fix possible crash in scheduler implement lock-free bit pool utility
This commit is contained in:
DH
parent
4e83c9e121
commit
0877d3f1cd
12 changed files with 1175 additions and 967 deletions
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@ -1,8 +1,6 @@
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#include "Renderer.hpp"
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#include "Device.hpp"
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#include "gnm/descriptors.hpp"
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#include "gnm/gnm.hpp"
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#include "rx/MemoryTable.hpp"
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#include <amdgpu/tiler.hpp>
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#include <gnm/constants.hpp>
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@ -14,7 +12,6 @@
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#include <shaders/fill_red.frag.h>
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#include <shaders/rect_list.geom.h>
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#include <bit>
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#include <vulkan/vulkan_core.h>
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using namespace shader;
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@ -35,39 +32,26 @@ VkRect2D toVkRect2D(amdgpu::PaScRect rect) {
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};
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}
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amdgpu::PaScRect intersection(amdgpu::PaScRect rect, amdgpu::PaScRect scissor) {
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amdgpu::PaScRect intersection(amdgpu::PaScRect lhs, amdgpu::PaScRect rhs) {
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if (!lhs.isValid()) {
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return rhs;
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}
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if (!rhs.isValid()) {
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return lhs;
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}
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amdgpu::PaScRect result{
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.left = std::max(rect.left, scissor.left),
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.top = std::max(rect.top, scissor.top),
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.right = std::min(rect.right, scissor.right),
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.bottom = std::min(rect.bottom, scissor.bottom),
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.left = std::max(lhs.left, rhs.left),
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.top = std::max(lhs.top, rhs.top),
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.right = std::min(lhs.right, rhs.right),
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.bottom = std::min(lhs.bottom, rhs.bottom),
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};
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result.top = std::min(result.top, result.bottom);
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result.bottom = std::max(result.top, result.bottom);
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result.left = std::min(result.left, result.right);
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result.right = std::max(result.left, result.right);
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return result;
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}
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} // namespace gnm
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struct MemoryTableSlot {
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std::uint64_t address;
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union {
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struct {
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std::uint64_t size : 40;
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std::uint64_t flags : 4;
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};
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std::uint64_t sizeAndFlags;
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};
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std::uint64_t deviceAddress;
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};
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struct MemoryTable {
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std::uint32_t count;
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std::uint32_t pad;
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MemoryTableSlot slots[];
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};
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static VkShaderEXT getPrimTypeRectGeomShader(amdgpu::Cache &cache) {
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static VkShaderEXT shader = VK_NULL_HANDLE;
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if (shader != VK_NULL_HANDLE) {
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@ -151,282 +135,6 @@ static VkPrimitiveTopology toVkPrimitiveType(gnm::PrimitiveType type) {
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}
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}
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struct ShaderResources : eval::Evaluator {
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amdgpu::Cache::Tag *cacheTag;
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shader::eval::Evaluator evaluator;
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std::map<std::uint32_t, std::uint32_t> slotResources;
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std::span<const std::uint32_t> userSgprs;
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std::uint32_t slotOffset = 0;
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rx::MemoryTableWithPayload<Access> bufferMemoryTable;
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std::vector<std::pair<std::uint32_t, std::uint64_t>> resourceSlotToAddress;
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std::vector<amdgpu::Cache::Sampler> samplerResources;
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std::vector<amdgpu::Cache::ImageView> imageResources[3];
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using Evaluator::eval;
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ShaderResources() = default;
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void loadResources(shader::gcn::Resources &res,
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std::span<const std::uint32_t> userSgprs) {
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this->userSgprs = userSgprs;
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for (auto &pointer : res.pointers) {
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auto pointerBase = eval(pointer.base).zExtScalar();
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auto pointerOffset = eval(pointer.offset).zExtScalar();
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if (!pointerBase || !pointerOffset) {
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res.dump();
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rx::die("failed to evaluate pointer");
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}
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bufferMemoryTable.map(*pointerBase,
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*pointerBase + *pointerOffset + pointer.size,
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Access::Read);
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resourceSlotToAddress.push_back(
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{slotOffset + pointer.resourceSlot, *pointerBase});
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}
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for (auto &bufferRes : res.buffers) {
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auto word0 = eval(bufferRes.words[0]).zExtScalar();
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auto word1 = eval(bufferRes.words[1]).zExtScalar();
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auto word2 = eval(bufferRes.words[2]).zExtScalar();
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auto word3 = eval(bufferRes.words[3]).zExtScalar();
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if (!word0 || !word1 || !word2 || !word3) {
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res.dump();
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rx::die("failed to evaluate V#");
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}
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gnm::VBuffer buffer{};
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer), &*word0,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 1, &*word1,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 2, &*word2,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 3, &*word3,
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sizeof(std::uint32_t));
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bufferMemoryTable.map(buffer.address(), buffer.address() + buffer.size(),
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bufferRes.access);
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resourceSlotToAddress.push_back(
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{slotOffset + bufferRes.resourceSlot, buffer.address()});
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}
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for (auto &texture : res.textures) {
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auto word0 = eval(texture.words[0]).zExtScalar();
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auto word1 = eval(texture.words[1]).zExtScalar();
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auto word2 = eval(texture.words[2]).zExtScalar();
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auto word3 = eval(texture.words[3]).zExtScalar();
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if (!word0 || !word1 || !word2 || !word3) {
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res.dump();
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rx::die("failed to evaluate 128 bit T#");
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}
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gnm::TBuffer buffer{};
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer), &*word0,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 1, &*word1,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 2, &*word2,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 3, &*word3,
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sizeof(std::uint32_t));
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if (texture.words[4] != nullptr) {
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auto word4 = eval(texture.words[4]).zExtScalar();
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auto word5 = eval(texture.words[5]).zExtScalar();
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auto word6 = eval(texture.words[6]).zExtScalar();
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auto word7 = eval(texture.words[7]).zExtScalar();
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if (!word4 || !word5 || !word6 || !word7) {
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res.dump();
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rx::die("failed to evaluate 256 bit T#");
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}
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 4, &*word4,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 5, &*word5,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 6, &*word6,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&buffer) + 7, &*word7,
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sizeof(std::uint32_t));
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}
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std::vector<amdgpu::Cache::ImageView> *resources = nullptr;
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switch (buffer.type) {
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case gnm::TextureType::Array1D:
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case gnm::TextureType::Dim1D:
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resources = &imageResources[0];
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break;
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case gnm::TextureType::Dim2D:
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case gnm::TextureType::Array2D:
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case gnm::TextureType::Msaa2D:
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case gnm::TextureType::MsaaArray2D:
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case gnm::TextureType::Cube:
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resources = &imageResources[1];
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break;
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case gnm::TextureType::Dim3D:
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resources = &imageResources[2];
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break;
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}
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rx::dieIf(resources == nullptr,
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"ShaderResources: unexpected texture type %u",
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static_cast<unsigned>(buffer.type));
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slotResources[slotOffset + texture.resourceSlot] = resources->size();
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resources->push_back(cacheTag->getImageView(
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amdgpu::ImageViewKey::createFrom(buffer), texture.access));
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}
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for (auto &sampler : res.samplers) {
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auto word0 = eval(sampler.words[0]).zExtScalar();
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auto word1 = eval(sampler.words[1]).zExtScalar();
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auto word2 = eval(sampler.words[2]).zExtScalar();
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auto word3 = eval(sampler.words[3]).zExtScalar();
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if (!word0 || !word1 || !word2 || !word3) {
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res.dump();
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rx::die("failed to evaluate S#");
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}
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gnm::SSampler sSampler{};
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std::memcpy(reinterpret_cast<std::uint32_t *>(&sSampler), &*word0,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&sSampler) + 1, &*word1,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&sSampler) + 2, &*word2,
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sizeof(std::uint32_t));
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std::memcpy(reinterpret_cast<std::uint32_t *>(&sSampler) + 3, &*word3,
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sizeof(std::uint32_t));
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if (sampler.unorm) {
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sSampler.force_unorm_coords = true;
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}
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slotResources[slotOffset + sampler.resourceSlot] =
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samplerResources.size();
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samplerResources.push_back(
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cacheTag->getSampler(amdgpu::SamplerKey::createFrom(sSampler)));
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}
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slotOffset += res.slots;
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}
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void buildMemoryTable(MemoryTable &memoryTable) {
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memoryTable.count = 0;
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for (auto p : bufferMemoryTable) {
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auto size = p.endAddress - p.beginAddress;
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auto buffer = cacheTag->getBuffer(p.beginAddress, size, p.payload);
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auto memoryTableSlot = memoryTable.count;
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memoryTable.slots[memoryTable.count++] = {
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.address = p.beginAddress,
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.size = size,
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.flags = static_cast<uint8_t>(p.payload),
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.deviceAddress = buffer.deviceAddress,
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};
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for (auto [slot, address] : resourceSlotToAddress) {
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if (address >= p.beginAddress && address < p.endAddress) {
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slotResources[slot] = memoryTableSlot;
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}
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}
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}
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}
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std::uint32_t getResourceSlot(std::uint32_t id) {
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if (auto it = slotResources.find(id); it != slotResources.end()) {
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return it->second;
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}
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return -1;
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}
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template <typename T> T readPointer(std::uint64_t address) {
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T result{};
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cacheTag->readMemory(&result, address, sizeof(result));
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return result;
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}
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eval::Value eval(ir::InstructionId instId,
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std::span<const ir::Operand> operands) override {
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if (instId == ir::amdgpu::POINTER) {
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auto type = operands[0].getAsValue();
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auto loadSize = *operands[1].getAsInt32();
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auto base = eval(operands[2]).zExtScalar();
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auto offset = eval(operands[3]).zExtScalar();
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if (!base || !offset) {
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rx::die("failed to evaluate pointer dependency");
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}
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eval::Value result;
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auto address = *base + *offset;
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switch (loadSize) {
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case 1:
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result = readPointer<std::uint8_t>(address);
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break;
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case 2:
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result = readPointer<std::uint16_t>(address);
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break;
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case 4:
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result = readPointer<std::uint32_t>(address);
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break;
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case 8:
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result = readPointer<std::uint64_t>(address);
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break;
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case 12:
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result = readPointer<u32vec3>(address);
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break;
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case 16:
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result = readPointer<u32vec4>(address);
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break;
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case 32:
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result = readPointer<std::array<std::uint32_t, 8>>(address);
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break;
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default:
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rx::die("unexpected pointer load size");
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}
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return result;
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}
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if (instId == ir::amdgpu::VBUFFER) {
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rx::die("resource depends on buffer value");
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}
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if (instId == ir::amdgpu::TBUFFER) {
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rx::die("resource depends on texture value");
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}
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if (instId == ir::amdgpu::SAMPLER) {
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rx::die("resource depends on sampler value");
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}
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if (instId == ir::amdgpu::USER_SGPR) {
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auto index = static_cast<std::uint32_t>(*operands[1].getAsInt32());
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rx::dieIf(index >= userSgprs.size(), "out of user sgprs");
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return userSgprs[index];
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}
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if (instId == ir::amdgpu::IMM) {
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auto address = static_cast<std::uint64_t>(*operands[1].getAsInt64());
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std::uint32_t result;
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cacheTag->readMemory(&result, address, sizeof(result));
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return result;
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}
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return Evaluator::eval(instId, operands);
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}
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};
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void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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std::uint32_t vertexCount, std::uint32_t firstInstance,
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std::uint32_t instanceCount, std::uint64_t indiciesAddress,
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@ -449,7 +157,7 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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return;
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}
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auto cacheTag = pipe.device->getCacheTag(vmId, pipe.scheduler);
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auto cacheTag = pipe.device->getGraphicsTag(vmId, pipe.scheduler);
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auto targetMask = pipe.context.cbTargetMask.raw;
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VkRenderingAttachmentInfo colorAttachments[8]{};
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@ -460,8 +168,12 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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VkRect2D viewPortScissors[8]{};
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unsigned renderTargets = 0;
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VkRenderingAttachmentInfo depthAttachment{};
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VkRenderingAttachmentInfo stencilAttachment{};
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VkRenderingAttachmentInfo depthAttachment{
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.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
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};
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VkRenderingAttachmentInfo stencilAttachment{
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.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
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};
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auto depthAccess = Access::None;
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auto stencilAccess = Access::None;
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@ -484,12 +196,15 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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}
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}
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// FIXME
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stencilAccess = Access::None;
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if (depthAccess != Access::None) {
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auto viewPortScissor = pipe.context.paScScreenScissor;
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auto viewPortRect = gnm::toVkRect2D(viewPortScissor);
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auto imageView = cacheTag.getImageView(
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{{
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{
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.readAddress = pipe.context.dbZReadBase,
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.writeAddress = pipe.context.dbZWriteBase,
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.dfmt = gnm::getDataFormat(pipe.context.dbZInfo.format),
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@ -502,7 +217,7 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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},
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.pitch = viewPortRect.extent.width,
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.kind = ImageKind::Depth,
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}},
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},
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depthAccess);
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depthAttachment = {
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@ -533,12 +248,12 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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}
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auto viewPortScissor = pipe.context.paScScreenScissor;
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// viewPortScissor = gnm::intersection(
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// viewPortScissor, pipe.context.paScVportScissor[renderTargets]);
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// viewPortScissor =
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// gnm::intersection(viewPortScissor, pipe.context.paScWindowScissor);
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// viewPortScissor =
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// gnm::intersection(viewPortScissor, pipe.context.paScGenericScissor);
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viewPortScissor = gnm::intersection(
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viewPortScissor, pipe.context.paScVportScissor[renderTargets]);
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viewPortScissor =
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gnm::intersection(viewPortScissor, pipe.context.paScWindowScissor);
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viewPortScissor =
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gnm::intersection(viewPortScissor, pipe.context.paScGenericScissor);
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auto viewPortRect = gnm::toVkRect2D(viewPortScissor);
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@ -554,7 +269,7 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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auto vkViewPortScissor = gnm::toVkRect2D(viewPortScissor);
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viewPortScissors[renderTargets] = vkViewPortScissor;
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ImageViewKey renderTargetInfo{};
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ImageKey renderTargetInfo{};
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renderTargetInfo.type = gnm::TextureType::Dim2D;
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renderTargetInfo.pitch = vkViewPortScissor.extent.width;
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renderTargetInfo.readAddress = static_cast<std::uint64_t>(cbColor.base)
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@ -572,7 +287,6 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
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cbColor.info.linearGeneral
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? TileMode{.raw = 0}
|
||||
: getDefaultTileModes()[cbColor.attrib.tileModeIndex];
|
||||
// std::printf("draw to %lx\n", renderTargetInfo.address);
|
||||
|
||||
auto access = Access::None;
|
||||
|
||||
|
|
@ -640,13 +354,6 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
|
|||
if (renderTargets == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
// if (pipe.context.cbTargetMask == 0) {
|
||||
// return;
|
||||
// }
|
||||
|
||||
// auto cache = pipe.device->getCache(vmId);
|
||||
|
||||
if (indiciesAddress == 0) {
|
||||
indexCount = vertexCount;
|
||||
}
|
||||
|
|
@ -659,244 +366,34 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
|
|||
VkShaderEXT shaders[stages.size()]{};
|
||||
|
||||
auto pipelineLayout = cacheTag.getGraphicsPipelineLayout();
|
||||
auto descriptorSets = cacheTag.createGraphicsDescriptorSets();
|
||||
|
||||
std::vector<std::uint32_t *> descriptorBuffers;
|
||||
auto &memoryTableBuffer = cacheTag.getCache()->getMemoryTableBuffer();
|
||||
std::uint64_t memoryTableAddress = memoryTableBuffer.getAddress();
|
||||
auto memoryTable = std::bit_cast<MemoryTable *>(memoryTableBuffer.getData());
|
||||
|
||||
std::uint64_t gdsAddress = cacheTag.getCache()->getGdsBuffer().getAddress();
|
||||
ShaderResources shaderResources;
|
||||
shaderResources.cacheTag = &cacheTag;
|
||||
|
||||
struct MemoryTableConfigSlot {
|
||||
std::uint32_t bufferIndex;
|
||||
std::uint32_t configIndex;
|
||||
std::uint32_t resourceSlot;
|
||||
};
|
||||
std::vector<MemoryTableConfigSlot> memoryTableConfigSlots;
|
||||
|
||||
auto addShader = [&](const SpiShaderPgm &pgm, shader::gcn::Stage stage) {
|
||||
shader::gcn::Environment env{
|
||||
.vgprCount = pgm.rsrc1.getVGprCount(),
|
||||
.sgprCount = pgm.rsrc1.getSGprCount(),
|
||||
.userSgprs = std::span(pgm.userData.data(), pgm.rsrc2.userSgpr),
|
||||
.supportsBarycentric = vk::context->supportsBarycentric,
|
||||
.supportsInt8 = vk::context->supportsInt8,
|
||||
.supportsInt64Atomics = vk::context->supportsInt64Atomics,
|
||||
};
|
||||
|
||||
auto shader = cacheTag.getShader({
|
||||
.address = pgm.address << 8,
|
||||
.stage = stage,
|
||||
.env = env,
|
||||
});
|
||||
|
||||
std::uint32_t slotOffset = shaderResources.slotOffset;
|
||||
|
||||
shaderResources.loadResources(
|
||||
shader.info->resources,
|
||||
std::span(pgm.userData.data(), pgm.rsrc2.userSgpr));
|
||||
|
||||
const auto &configSlots = shader.info->configSlots;
|
||||
|
||||
auto configSize = configSlots.size() * sizeof(std::uint32_t);
|
||||
auto configBuffer = cacheTag.getInternalBuffer(configSize);
|
||||
|
||||
auto configPtr = reinterpret_cast<std::uint32_t *>(configBuffer.data);
|
||||
|
||||
shader::gcn::PsVGprInput
|
||||
psVgprInput[static_cast<std::size_t>(shader::gcn::PsVGprInput::Count)];
|
||||
std::size_t psVgprInputs = 0;
|
||||
|
||||
if (stage == shader::gcn::Stage::Ps) {
|
||||
SpiPsInput spiInputAddr = pipe.context.spiPsInputAddr;
|
||||
|
||||
if (spiInputAddr.perspSampleEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::IPerspSample;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JPerspSample;
|
||||
}
|
||||
if (spiInputAddr.perspCenterEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::IPerspCenter;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JPerspCenter;
|
||||
}
|
||||
if (spiInputAddr.perspCentroidEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::IPerspCentroid;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JPerspCentroid;
|
||||
}
|
||||
if (spiInputAddr.perspPullModelEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::IW;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JW;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::_1W;
|
||||
}
|
||||
if (spiInputAddr.linearSampleEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::ILinearSample;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JLinearSample;
|
||||
}
|
||||
if (spiInputAddr.linearCenterEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::ILinearCenter;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JLinearCenter;
|
||||
}
|
||||
if (spiInputAddr.linearCentroidEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::ILinearCentroid;
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::JLinearCentroid;
|
||||
}
|
||||
if (spiInputAddr.posXFloatEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::X;
|
||||
}
|
||||
if (spiInputAddr.posYFloatEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::Y;
|
||||
}
|
||||
if (spiInputAddr.posZFloatEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::Z;
|
||||
}
|
||||
if (spiInputAddr.posWFloatEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::W;
|
||||
}
|
||||
if (spiInputAddr.frontFaceEna) {
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::FrontFace;
|
||||
}
|
||||
if (spiInputAddr.ancillaryEna) {
|
||||
rx::die("unimplemented ancillary fs input");
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::Ancillary;
|
||||
}
|
||||
if (spiInputAddr.sampleCoverageEna) {
|
||||
rx::die("unimplemented sample coverage fs input");
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::SampleCoverage;
|
||||
}
|
||||
if (spiInputAddr.posFixedPtEna) {
|
||||
rx::die("unimplemented pos fixed fs input");
|
||||
psVgprInput[psVgprInputs++] = shader::gcn::PsVGprInput::PosFixed;
|
||||
}
|
||||
}
|
||||
|
||||
for (std::size_t index = 0; const auto &slot : configSlots) {
|
||||
switch (slot.type) {
|
||||
case shader::gcn::ConfigType::Imm:
|
||||
cacheTag.readMemory(&configPtr[index], slot.data,
|
||||
sizeof(std::uint32_t));
|
||||
break;
|
||||
case shader::gcn::ConfigType::UserSgpr:
|
||||
configPtr[index] = pgm.userData[slot.data];
|
||||
break;
|
||||
case shader::gcn::ConfigType::ViewPortOffsetX:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.paClVports[slot.data].xOffset /
|
||||
(viewPorts[0].width / 2.f) -
|
||||
1);
|
||||
break;
|
||||
case shader::gcn::ConfigType::ViewPortOffsetY:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.paClVports[slot.data].yOffset /
|
||||
(viewPorts[slot.data].height / 2.f) -
|
||||
1);
|
||||
break;
|
||||
case shader::gcn::ConfigType::ViewPortOffsetZ:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.paClVports[slot.data].zOffset);
|
||||
break;
|
||||
case shader::gcn::ConfigType::ViewPortScaleX:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.paClVports[slot.data].xScale /
|
||||
(viewPorts[slot.data].width / 2.f));
|
||||
break;
|
||||
case shader::gcn::ConfigType::ViewPortScaleY:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.paClVports[slot.data].yScale /
|
||||
(viewPorts[slot.data].height / 2.f));
|
||||
break;
|
||||
case shader::gcn::ConfigType::ViewPortScaleZ:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.paClVports[slot.data].zScale);
|
||||
break;
|
||||
case shader::gcn::ConfigType::PsInputVGpr:
|
||||
if (slot.data > psVgprInputs) {
|
||||
configPtr[index] = ~0;
|
||||
} else {
|
||||
configPtr[index] =
|
||||
std::bit_cast<std::uint32_t>(psVgprInput[slot.data]);
|
||||
}
|
||||
break;
|
||||
case shader::gcn::ConfigType::VsPrimType:
|
||||
if (indexBuffer.handle == VK_NULL_HANDLE &&
|
||||
pipe.uConfig.vgtPrimitiveType != indexBuffer.primType) {
|
||||
configPtr[index] =
|
||||
static_cast<std::uint32_t>(pipe.uConfig.vgtPrimitiveType.value);
|
||||
} else {
|
||||
configPtr[index] = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case shader::gcn::ConfigType::ResourceSlot:
|
||||
memoryTableConfigSlots.push_back({
|
||||
.bufferIndex = static_cast<std::uint32_t>(descriptorBuffers.size()),
|
||||
.configIndex = static_cast<std::uint32_t>(index),
|
||||
.resourceSlot = static_cast<std::uint32_t>(slotOffset + slot.data),
|
||||
});
|
||||
break;
|
||||
|
||||
case shader::gcn::ConfigType::MemoryTable:
|
||||
if (slot.data == 0) {
|
||||
configPtr[index] = static_cast<std::uint32_t>(memoryTableAddress);
|
||||
} else {
|
||||
configPtr[index] =
|
||||
static_cast<std::uint32_t>(memoryTableAddress >> 32);
|
||||
}
|
||||
break;
|
||||
case shader::gcn::ConfigType::Gds:
|
||||
if (slot.data == 0) {
|
||||
configPtr[index] = static_cast<std::uint32_t>(gdsAddress);
|
||||
} else {
|
||||
configPtr[index] = static_cast<std::uint32_t>(gdsAddress >> 32);
|
||||
}
|
||||
break;
|
||||
|
||||
case shader::gcn::ConfigType::CbCompSwap:
|
||||
configPtr[index] = std::bit_cast<std::uint32_t>(
|
||||
pipe.context.cbColor[slot.data].info.compSwap);
|
||||
break;
|
||||
}
|
||||
|
||||
++index;
|
||||
}
|
||||
|
||||
VkDescriptorBufferInfo bufferInfo{
|
||||
.buffer = configBuffer.handle,
|
||||
.offset = configBuffer.offset,
|
||||
.range = configSize,
|
||||
};
|
||||
|
||||
auto stageIndex = Cache::getStageIndex(shader.stage);
|
||||
|
||||
VkWriteDescriptorSet writeDescSet{
|
||||
.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
|
||||
.dstSet = descriptorSets[stageIndex],
|
||||
.dstBinding = 0,
|
||||
.descriptorCount = 1,
|
||||
.descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER,
|
||||
.pBufferInfo = &bufferInfo,
|
||||
};
|
||||
|
||||
vkUpdateDescriptorSets(vk::context->device, 1, &writeDescSet, 0, nullptr);
|
||||
|
||||
shaders[stageIndex] = shader.handle
|
||||
? shader.handle
|
||||
: getFillRedFragShader(*cacheTag.getCache());
|
||||
descriptorBuffers.push_back(configPtr);
|
||||
};
|
||||
auto descriptorSets = cacheTag.getDescriptorSets();
|
||||
Cache::Shader vertexShader;
|
||||
|
||||
if (pipe.context.vgtShaderStagesEn.vsEn == amdgpu::VsStage::VsReal) {
|
||||
addShader(pipe.sh.spiShaderPgmVs, shader::gcn::Stage::VsVs);
|
||||
gnm::PrimitiveType vsPrimType = {};
|
||||
if (indexBuffer.handle == VK_NULL_HANDLE &&
|
||||
pipe.uConfig.vgtPrimitiveType != indexBuffer.primType) {
|
||||
vsPrimType = pipe.uConfig.vgtPrimitiveType.value;
|
||||
}
|
||||
|
||||
vertexShader =
|
||||
cacheTag.getVertexShader(gcn::Stage::VsVs, pipe.sh.spiShaderPgmVs,
|
||||
pipe.context, vsPrimType, viewPorts);
|
||||
}
|
||||
|
||||
if (true) {
|
||||
addShader(pipe.sh.spiShaderPgmPs, shader::gcn::Stage::Ps);
|
||||
} else {
|
||||
auto pixelShader =
|
||||
cacheTag.getPixelShader(pipe.sh.spiShaderPgmPs, pipe.context, viewPorts);
|
||||
|
||||
if (pixelShader.handle == nullptr) {
|
||||
shaders[Cache::getStageIndex(VK_SHADER_STAGE_FRAGMENT_BIT)] =
|
||||
getFillRedFragShader(*cacheTag.getCache());
|
||||
}
|
||||
|
||||
shaders[Cache::getStageIndex(VK_SHADER_STAGE_VERTEX_BIT)] =
|
||||
vertexShader.handle;
|
||||
shaders[Cache::getStageIndex(VK_SHADER_STAGE_FRAGMENT_BIT)] =
|
||||
pixelShader.handle;
|
||||
|
||||
if (pipe.uConfig.vgtPrimitiveType == gnm::PrimitiveType::RectList) {
|
||||
shaders[Cache::getStageIndex(VK_SHADER_STAGE_GEOMETRY_BIT)] =
|
||||
getPrimTypeRectGeomShader(*cacheTag.getCache());
|
||||
|
|
@ -906,18 +403,24 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
|
|||
vertexCount = indexBuffer.indexCount;
|
||||
}
|
||||
|
||||
auto commandBuffer = pipe.scheduler.getCommandBuffer();
|
||||
|
||||
VkRenderingInfo renderInfo{
|
||||
.sType = VK_STRUCTURE_TYPE_RENDERING_INFO,
|
||||
.renderArea = gnm::toVkRect2D(pipe.context.paScScreenScissor),
|
||||
.layerCount = 1,
|
||||
.colorAttachmentCount = renderTargets,
|
||||
.pColorAttachments = colorAttachments,
|
||||
.pDepthAttachment = &depthAttachment,
|
||||
// .pStencilAttachment = &stencilAttachment,
|
||||
.pDepthAttachment =
|
||||
depthAccess != Access::None ? &depthAttachment : nullptr,
|
||||
.pStencilAttachment =
|
||||
stencilAccess != Access::None ? &stencilAttachment : nullptr,
|
||||
};
|
||||
|
||||
cacheTag.buildDescriptors(descriptorSets[0]);
|
||||
|
||||
pipe.scheduler.afterSubmit([cacheTag = std::move(cacheTag)] {});
|
||||
|
||||
auto commandBuffer = pipe.scheduler.getCommandBuffer();
|
||||
|
||||
vkCmdBeginRendering(commandBuffer, &renderInfo);
|
||||
vkCmdSetRasterizerDiscardEnable(commandBuffer, VK_FALSE);
|
||||
|
||||
|
|
@ -991,57 +494,6 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
|
|||
|
||||
vk::CmdBindShadersEXT(commandBuffer, stages.size(), stages.data(), shaders);
|
||||
|
||||
shaderResources.buildMemoryTable(*memoryTable);
|
||||
|
||||
for (auto &sampler : shaderResources.samplerResources) {
|
||||
uint32_t index = &sampler - shaderResources.samplerResources.data();
|
||||
|
||||
VkDescriptorImageInfo samplerInfo{.sampler = sampler.handle};
|
||||
|
||||
VkWriteDescriptorSet writeDescSet{
|
||||
.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
|
||||
.dstSet = descriptorSets[0],
|
||||
.dstBinding = Cache::getDescriptorBinding(VK_DESCRIPTOR_TYPE_SAMPLER),
|
||||
.dstArrayElement = index,
|
||||
.descriptorCount = 1,
|
||||
.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLER,
|
||||
.pImageInfo = &samplerInfo,
|
||||
};
|
||||
|
||||
vkUpdateDescriptorSets(vk::context->device, 1, &writeDescSet, 0, nullptr);
|
||||
}
|
||||
|
||||
for (auto &imageResources : shaderResources.imageResources) {
|
||||
auto dim = (&imageResources - shaderResources.imageResources) + 1;
|
||||
for (auto &image : imageResources) {
|
||||
uint32_t index = &image - imageResources.data();
|
||||
|
||||
VkDescriptorImageInfo imageInfo{
|
||||
.imageView = image.handle,
|
||||
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
|
||||
};
|
||||
|
||||
VkWriteDescriptorSet writeDescSet{
|
||||
.sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
|
||||
.dstSet = descriptorSets[0],
|
||||
.dstBinding = static_cast<uint32_t>(Cache::getDescriptorBinding(
|
||||
VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, dim)),
|
||||
.dstArrayElement = index,
|
||||
.descriptorCount = 1,
|
||||
.descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
|
||||
.pImageInfo = &imageInfo,
|
||||
};
|
||||
|
||||
vkUpdateDescriptorSets(vk::context->device, 1, &writeDescSet, 0, nullptr);
|
||||
}
|
||||
}
|
||||
|
||||
for (auto &mtConfig : memoryTableConfigSlots) {
|
||||
auto config = descriptorBuffers[mtConfig.bufferIndex];
|
||||
config[mtConfig.configIndex] =
|
||||
shaderResources.getResourceSlot(mtConfig.resourceSlot);
|
||||
}
|
||||
|
||||
if (indexBuffer.handle != VK_NULL_HANDLE) {
|
||||
vkCmdBindIndexBuffer(commandBuffer, indexBuffer.handle, indexBuffer.offset,
|
||||
gnm::toVkIndexType(indexBuffer.indexType));
|
||||
|
|
@ -1054,10 +506,19 @@ void amdgpu::draw(GraphicsPipe &pipe, int vmId, std::uint32_t firstVertex,
|
|||
|
||||
vkCmdEndRendering(commandBuffer);
|
||||
pipe.scheduler.submit();
|
||||
pipe.scheduler.then([=, cacheTag = std::move(cacheTag),
|
||||
shaderResources = std::move(shaderResources)] {});
|
||||
}
|
||||
|
||||
// void amdgpu::dispatch(Scheduler &sched,
|
||||
// amdgpu::Registers::ComputeConfig &computeConfig, int
|
||||
// vmId, std::uint32_t groupCountX, std::uint32_t
|
||||
// groupCountY, std::uint32_t groupCountZ) {
|
||||
|
||||
// vkCmdDispatch(sched.getCommandBuffer(), groupCountX, groupCountY,
|
||||
// groupCountZ);
|
||||
|
||||
// sched.submit();
|
||||
// }
|
||||
|
||||
static void
|
||||
transitionImageLayout(VkCommandBuffer commandBuffer, VkImage image,
|
||||
VkImageLayout oldLayout, VkImageLayout newLayout,
|
||||
|
|
@ -1115,10 +576,10 @@ transitionImageLayout(VkCommandBuffer commandBuffer, VkImage image,
|
|||
|
||||
void amdgpu::flip(Cache::Tag &cacheTag, VkCommandBuffer commandBuffer,
|
||||
VkExtent2D targetExtent, std::uint64_t address,
|
||||
VkImageView target, VkExtent2D imageExtent,
|
||||
FlipType type, TileMode tileMode, gnm::DataFormat dfmt,
|
||||
VkImageView target, VkExtent2D imageExtent, FlipType type,
|
||||
TileMode tileMode, gnm::DataFormat dfmt,
|
||||
gnm::NumericFormat nfmt) {
|
||||
ImageViewKey framebuffer{};
|
||||
ImageKey framebuffer{};
|
||||
framebuffer.readAddress = address;
|
||||
framebuffer.type = gnm::TextureType::Dim2D;
|
||||
framebuffer.dfmt = dfmt;
|
||||
|
|
@ -1181,7 +642,8 @@ void amdgpu::flip(Cache::Tag &cacheTag, VkCommandBuffer commandBuffer,
|
|||
|
||||
vkCmdBeginRendering(commandBuffer, &renderInfo);
|
||||
|
||||
cacheTag.getDevice()->flipPipeline.bind(cacheTag.getScheduler(), type, imageView.handle, sampler.handle);
|
||||
cacheTag.getDevice()->flipPipeline.bind(cacheTag.getScheduler(), type,
|
||||
imageView.handle, sampler.handle);
|
||||
|
||||
vkCmdSetViewportWithCount(commandBuffer, 1, viewPorts);
|
||||
vkCmdSetScissorWithCount(commandBuffer, 1, viewPortScissors);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue