mirror of
https://github.com/RPCSX/rpcsx.git
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295 lines
8.2 KiB
C++
295 lines
8.2 KiB
C++
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#pragma once
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namespace shader::ir::ds {
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enum Op {
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ADD_U32,
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SUB_U32,
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RSUB_U32,
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INC_U32,
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DEC_U32,
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MIN_I32,
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MAX_I32,
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MIN_U32,
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MAX_U32,
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AND_B32,
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OR_B32,
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XOR_B32,
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MSKOR_B32,
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WRITE_B32,
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WRITE2_B32,
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WRITE2ST64_B32,
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CMPST_B32,
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CMPST_F32,
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MIN_F32,
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MAX_F32,
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NOP,
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GWS_SEMA_RELEASE_ALL = 24,
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GWS_INIT,
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GWS_SEMA_V,
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GWS_SEMA_BR,
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GWS_SEMA_P,
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GWS_BARRIER,
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WRITE_B8,
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WRITE_B16,
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ADD_RTN_U32,
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SUB_RTN_U32,
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RSUB_RTN_U32,
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INC_RTN_U32,
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DEC_RTN_U32,
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MIN_RTN_I32,
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MAX_RTN_I32,
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MIN_RTN_U32,
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MAX_RTN_U32,
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AND_RTN_B32,
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OR_RTN_B32,
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XOR_RTN_B32,
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MSKOR_RTN_B32,
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WRXCHG_RTN_B32,
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WRXCHG2_RTN_B32,
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WRXCHG2ST64_RTN_B32,
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CMPST_RTN_B32,
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CMPST_RTN_F32,
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MIN_RTN_F32,
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MAX_RTN_F32,
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WRAP_RTN_B32,
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SWIZZLE_B32,
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READ_B32,
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READ2_B32,
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READ2ST64_B32,
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READ_I8,
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READ_U8,
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READ_I16,
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READ_U16,
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CONSUME,
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APPEND,
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ORDERED_COUNT,
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ADD_U64,
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SUB_U64,
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RSUB_U64,
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INC_U64,
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DEC_U64,
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MIN_I64,
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MAX_I64,
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MIN_U64,
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MAX_U64,
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AND_B64,
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OR_B64,
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XOR_B64,
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MSKOR_B64,
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WRITE_B64,
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WRITE2_B64,
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WRITE2ST64_B64,
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CMPST_B64,
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CMPST_F64,
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MIN_F64,
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MAX_F64,
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ADD_RTN_U64 = 96,
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SUB_RTN_U64,
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RSUB_RTN_U64,
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INC_RTN_U64,
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DEC_RTN_U64,
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MIN_RTN_I64,
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MAX_RTN_I64,
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MIN_RTN_U64,
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MAX_RTN_U64,
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AND_RTN_B64,
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OR_RTN_B64,
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XOR_RTN_B64,
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MSKOR_RTN_B64,
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WRXCHG_RTN_B64,
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WRXCHG2_RTN_B64,
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WRXCHG2ST64_RTN_B64,
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CMPST_RTN_B64,
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CMPST_RTN_F64,
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MIN_RTN_F64,
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MAX_RTN_F64,
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READ_B64 = 118,
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READ2_B64,
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READ2ST64_B64,
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CONDXCHG32_RTN_B64 = 126,
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ADD_SRC2_U32 = 128,
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SUB_SRC2_U32,
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RSUB_SRC2_U32,
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INC_SRC2_U32,
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DEC_SRC2_U32,
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MIN_SRC2_I32,
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MAX_SRC2_I32,
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MIN_SRC2_U32,
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MAX_SRC2_U32,
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AND_SRC2_B32,
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OR_SRC2_B32,
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XOR_SRC2_B32,
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WRITE_SRC2_B32,
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MIN_SRC2_F32 = 146,
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MAX_SRC2_F32,
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ADD_SRC2_U64 = 192,
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SUB_SRC2_U64,
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RSUB_SRC2_U64,
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INC_SRC2_U64,
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DEC_SRC2_U64,
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MIN_SRC2_I64,
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MAX_SRC2_I64,
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MIN_SRC2_U64,
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MAX_SRC2_U64,
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AND_SRC2_B64,
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OR_SRC2_B64,
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XOR_SRC2_B64,
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WRITE_SRC2_B64,
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MIN_SRC2_F64 = 210,
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MAX_SRC2_F64,
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WRITE_B96 = 222,
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WRITE_B128,
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CONDXCHG32_RTN_B128 = 253,
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READ_B96,
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READ_B128,
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OpCount
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};
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inline const char *getInstructionName(unsigned id) {
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switch (id) {
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case ADD_U32: return "ds_add_u32";
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case SUB_U32: return "ds_sub_u32";
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case RSUB_U32: return "ds_rsub_u32";
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case INC_U32: return "ds_inc_u32";
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case DEC_U32: return "ds_dec_u32";
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case MIN_I32: return "ds_min_i32";
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case MAX_I32: return "ds_max_i32";
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case MIN_U32: return "ds_min_u32";
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case MAX_U32: return "ds_max_u32";
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case AND_B32: return "ds_and_b32";
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case OR_B32: return "ds_or_b32";
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case XOR_B32: return "ds_xor_b32";
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case MSKOR_B32: return "ds_mskor_b32";
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case WRITE_B32: return "ds_write_b32";
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case WRITE2_B32: return "ds_write2_b32";
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case WRITE2ST64_B32: return "ds_write2st64_b32";
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case CMPST_B32: return "ds_cmpst_b32";
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case CMPST_F32: return "ds_cmpst_f32";
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case MIN_F32: return "ds_min_f32";
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case MAX_F32: return "ds_max_f32";
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case NOP: return "ds_nop";
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case GWS_SEMA_RELEASE_ALL: return "ds_gws_sema_release_all";
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case GWS_INIT: return "ds_gws_init";
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case GWS_SEMA_V: return "ds_gws_sema_v";
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case GWS_SEMA_BR: return "ds_gws_sema_br";
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case GWS_SEMA_P: return "ds_gws_sema_p";
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case GWS_BARRIER: return "ds_gws_barrier";
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case WRITE_B8: return "ds_write_b8";
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case WRITE_B16: return "ds_write_b16";
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case ADD_RTN_U32: return "ds_add_rtn_u32";
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case SUB_RTN_U32: return "ds_sub_rtn_u32";
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case RSUB_RTN_U32: return "ds_rsub_rtn_u32";
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case INC_RTN_U32: return "ds_inc_rtn_u32";
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case DEC_RTN_U32: return "ds_dec_rtn_u32";
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case MIN_RTN_I32: return "ds_min_rtn_i32";
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case MAX_RTN_I32: return "ds_max_rtn_i32";
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case MIN_RTN_U32: return "ds_min_rtn_u32";
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case MAX_RTN_U32: return "ds_max_rtn_u32";
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case AND_RTN_B32: return "ds_and_rtn_b32";
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case OR_RTN_B32: return "ds_or_rtn_b32";
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case XOR_RTN_B32: return "ds_xor_rtn_b32";
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case MSKOR_RTN_B32: return "ds_mskor_rtn_b32";
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case WRXCHG_RTN_B32: return "ds_wrxchg_rtn_b32";
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case WRXCHG2_RTN_B32: return "ds_wrxchg2_rtn_b32";
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case WRXCHG2ST64_RTN_B32: return "ds_wrxchg2st64_rtn_b32";
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case CMPST_RTN_B32: return "ds_cmpst_rtn_b32";
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case CMPST_RTN_F32: return "ds_cmpst_rtn_f32";
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case MIN_RTN_F32: return "ds_min_rtn_f32";
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case MAX_RTN_F32: return "ds_max_rtn_f32";
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case WRAP_RTN_B32: return "ds_wrap_rtn_b32";
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case SWIZZLE_B32: return "ds_swizzle_b32";
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case READ_B32: return "ds_read_b32";
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case READ2_B32: return "ds_read2_b32";
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case READ2ST64_B32: return "ds_read2st64_b32";
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case READ_I8: return "ds_read_i8";
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case READ_U8: return "ds_read_u8";
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case READ_I16: return "ds_read_i16";
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case READ_U16: return "ds_read_u16";
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case CONSUME: return "ds_consume";
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case APPEND: return "ds_append";
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case ORDERED_COUNT: return "ds_ordered_count";
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case ADD_U64: return "ds_add_u64";
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case SUB_U64: return "ds_sub_u64";
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case RSUB_U64: return "ds_rsub_u64";
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case INC_U64: return "ds_inc_u64";
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case DEC_U64: return "ds_dec_u64";
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case MIN_I64: return "ds_min_i64";
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case MAX_I64: return "ds_max_i64";
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case MIN_U64: return "ds_min_u64";
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case MAX_U64: return "ds_max_u64";
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case AND_B64: return "ds_and_b64";
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case OR_B64: return "ds_or_b64";
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case XOR_B64: return "ds_xor_b64";
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case MSKOR_B64: return "ds_mskor_b64";
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case WRITE_B64: return "ds_write_b64";
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case WRITE2_B64: return "ds_write2_b64";
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case WRITE2ST64_B64: return "ds_write2st64_b64";
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case CMPST_B64: return "ds_cmpst_b64";
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case CMPST_F64: return "ds_cmpst_f64";
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case MIN_F64: return "ds_min_f64";
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case MAX_F64: return "ds_max_f64";
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case ADD_RTN_U64: return "ds_add_rtn_u64";
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case SUB_RTN_U64: return "ds_sub_rtn_u64";
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case RSUB_RTN_U64: return "ds_rsub_rtn_u64";
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case INC_RTN_U64: return "ds_inc_rtn_u64";
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case DEC_RTN_U64: return "ds_dec_rtn_u64";
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case MIN_RTN_I64: return "ds_min_rtn_i64";
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case MAX_RTN_I64: return "ds_max_rtn_i64";
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case MIN_RTN_U64: return "ds_min_rtn_u64";
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case MAX_RTN_U64: return "ds_max_rtn_u64";
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case AND_RTN_B64: return "ds_and_rtn_b64";
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case OR_RTN_B64: return "ds_or_rtn_b64";
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case XOR_RTN_B64: return "ds_xor_rtn_b64";
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case MSKOR_RTN_B64: return "ds_mskor_rtn_b64";
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case WRXCHG_RTN_B64: return "ds_wrxchg_rtn_b64";
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case WRXCHG2_RTN_B64: return "ds_wrxchg2_rtn_b64";
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case WRXCHG2ST64_RTN_B64: return "ds_wrxchg2st64_rtn_b64";
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case CMPST_RTN_B64: return "ds_cmpst_rtn_b64";
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case CMPST_RTN_F64: return "ds_cmpst_rtn_f64";
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case MIN_RTN_F64: return "ds_min_rtn_f64";
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case MAX_RTN_F64: return "ds_max_rtn_f64";
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case READ_B64: return "ds_read_b64";
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case READ2_B64: return "ds_read2_b64";
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case READ2ST64_B64: return "ds_read2st64_b64";
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case CONDXCHG32_RTN_B64: return "ds_condxchg32_rtn_b64";
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case ADD_SRC2_U32: return "ds_add_src2_u32";
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case SUB_SRC2_U32: return "ds_sub_src2_u32";
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case RSUB_SRC2_U32: return "ds_rsub_src2_u32";
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case INC_SRC2_U32: return "ds_inc_src2_u32";
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case DEC_SRC2_U32: return "ds_dec_src2_u32";
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case MIN_SRC2_I32: return "ds_min_src2_i32";
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case MAX_SRC2_I32: return "ds_max_src2_i32";
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case MIN_SRC2_U32: return "ds_min_src2_u32";
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case MAX_SRC2_U32: return "ds_max_src2_u32";
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case AND_SRC2_B32: return "ds_and_src2_b32";
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case OR_SRC2_B32: return "ds_or_src2_b32";
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case XOR_SRC2_B32: return "ds_xor_src2_b32";
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case WRITE_SRC2_B32: return "ds_write_src2_b32";
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case MIN_SRC2_F32: return "ds_min_src2_f32";
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case MAX_SRC2_F32: return "ds_max_src2_f32";
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case ADD_SRC2_U64: return "ds_add_src2_u64";
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case SUB_SRC2_U64: return "ds_sub_src2_u64";
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case RSUB_SRC2_U64: return "ds_rsub_src2_u64";
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case INC_SRC2_U64: return "ds_inc_src2_u64";
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case DEC_SRC2_U64: return "ds_dec_src2_u64";
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case MIN_SRC2_I64: return "ds_min_src2_i64";
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case MAX_SRC2_I64: return "ds_max_src2_i64";
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case MIN_SRC2_U64: return "ds_min_src2_u64";
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case MAX_SRC2_U64: return "ds_max_src2_u64";
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case AND_SRC2_B64: return "ds_and_src2_b64";
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case OR_SRC2_B64: return "ds_or_src2_b64";
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case XOR_SRC2_B64: return "ds_xor_src2_b64";
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case WRITE_SRC2_B64: return "ds_write_src2_b64";
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case MIN_SRC2_F64: return "ds_min_src2_f64";
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case MAX_SRC2_F64: return "ds_max_src2_f64";
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case WRITE_B96: return "ds_write_b96";
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case WRITE_B128: return "ds_write_b128";
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case CONDXCHG32_RTN_B128: return "ds_condxchg32_rtn_b128";
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case READ_B96: return "ds_read_b96";
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case READ_B128: return "ds_read_b128";
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}
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return nullptr;
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}
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} // namespace shader::ir::ds
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