2012-11-15 01:39:56 +02:00
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#pragma once
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#include "Emu/Cell/SPUOpcodes.h"
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2013-07-03 19:17:16 +03:00
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#include "Emu/Cell/PPCDisAsm.h"
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2012-11-15 01:39:56 +02:00
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#include "Emu/Cell/SPUThread.h"
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#include "Gui/DisAsmFrame.h"
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#include "Emu/Memory/Memory.h"
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class SPU_DisAsm
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: public SPU_Opcodes
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, public PPC_DisAsm
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2012-11-15 01:39:56 +02:00
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{
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public:
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PPCThread& CPU;
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SPU_DisAsm()
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: PPC_DisAsm(*(PPCThread*)NULL, DumpMode)
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, CPU(*(PPCThread*)NULL)
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{
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}
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SPU_DisAsm(PPCThread& cpu, DisAsmModes mode = NormalMode)
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: PPC_DisAsm(cpu, mode)
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, CPU(cpu)
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{
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}
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~SPU_DisAsm()
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{
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}
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private:
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void Exit()
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{
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if(m_mode == NormalMode && !disasm_frame->exit)
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{
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disasm_frame->Close();
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}
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this->~SPU_DisAsm();
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}
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virtual u32 DisAsmBranchTarget(const s32 imm)
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{
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return branchTarget(m_mode == NormalMode ? CPU.PC : dump_pc, imm);
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}
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private:
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//0 - 10
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void STOP(u32 code)
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{
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Write(wxString::Format("stop 0x%x", code));
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}
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void LNOP()
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{
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Write("lnop");
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}
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void SYNC(u32 Cbit)
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{
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Write(wxString::Format("sync %d", Cbit));
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}
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void DSYNC()
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{
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Write("dsync");
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}
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void MFSPR(u32 rt, u32 sa)
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{
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Write(wxString::Format("mfspr %s,%s", spu_reg_name[rt], spu_reg_name[sa])); // Are SPR mapped on the GPR or are there 128 additional registers ?
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}
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void RDCH(u32 rt, u32 ra)
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{
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Write(wxString::Format("rdch %s,%s", spu_reg_name[rt], spu_ch_name[ra]));
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}
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void RCHCNT(u32 rt, u32 ra)
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{
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Write(wxString::Format("rchcnt %s,%s", spu_reg_name[rt], spu_ch_name[ra]));
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}
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void SF(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("sf %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void OR(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("or %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void BG(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("bg %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void SFH(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("sfh %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void NOR(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("nor %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ABSDB(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("absdb %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROT(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("rot %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROTM(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("rotm %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROTMA(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("rotma %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void SHL(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("shl %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROTH(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("roth %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROTHM(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("rothm %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROTMAH(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("rotmah %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void SHLH(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("shlh %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void ROTI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("roti %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void ROTMI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("rotmi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void ROTMAI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("rotmai %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void SHLI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("shli %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void ROTHI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("rothi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void ROTHMI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("rothmi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void ROTMAHI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("rotmahi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void SHLHI(u32 rt, u32 ra, s32 i7)
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{
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Write(wxString::Format("shlhi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
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}
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void A(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("a %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void AND(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("and %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void CG(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("cg %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void AH(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("ah %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void NAND(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("nand %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void AVGB(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("avgb %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void MTSPR(u32 rt, u32 sa)
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{
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Write(wxString::Format("mtspr %s,%s", spu_reg_name[rt], spu_reg_name[sa]));
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}
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void WRCH(u32 ra, u32 rt)
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{
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Write(wxString::Format("wrch %s,%s", spu_ch_name[ra], spu_reg_name[rt]));
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}
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void BIZ(u32 rt, u32 ra)
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{
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Write(wxString::Format("biz %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
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}
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void BINZ(u32 rt, u32 ra)
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{
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Write(wxString::Format("binz %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
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}
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void BIHZ(u32 rt, u32 ra)
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{
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Write(wxString::Format("bihz %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
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}
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void BIHNZ(u32 rt, u32 ra)
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{
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Write(wxString::Format("bihnz %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
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}
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void STOPD(u32 rc, u32 ra, u32 rb)
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{
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Write(wxString::Format("bihnz %s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void STQX(u32 rt, u32 ra, u32 rb)
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{
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Write(wxString::Format("stqx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
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}
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void BI(u32 ra)
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{
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Write(wxString::Format("bi %s", spu_reg_name[ra]));
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}
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void BISL(u32 rt, u32 ra)
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{
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Write(wxString::Format("bisl %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
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}
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void IRET(u32 ra)
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{
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Write(wxString::Format("iret %s", spu_reg_name[ra]));
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}
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void BISLED(u32 rt, u32 ra)
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{
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Write(wxString::Format("bisled %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
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}
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void HBR(u32 p, u32 ro, u32 ra)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hbr 0x%x,%s", DisAsmBranchTarget(ro), spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void GB(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("gb %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void GBH(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("gbh %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void GBB(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("gbb %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FSM(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fsm %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FSMH(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fsmh %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FSMB(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fsmb %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FREST(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("frest %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FRSQEST(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("frsqest %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void LQX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("lqx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQBYBI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqbybi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQMBYBI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqmbybi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SHLQBYBI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("shlqbybi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CBX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cbx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CHX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("chx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CWX(u32 rt, u32 ra, u32 rb)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cwx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CDX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cdx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQBI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqbi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQMBI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqmbi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SHLQBI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("shlqbi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQBY(u32 rt, u32 ra, u32 rb)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
2013-06-30 11:46:29 +03:00
|
|
|
Write(wxString::Format("rotqby %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQMBY(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqmby %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SHLQBY(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("shlqby %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ORX(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("orx %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CBD(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cbd %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CHD(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("chd %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CWD(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cwd %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CDD(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cdd %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQBII(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqbii %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQMBII(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqmbii %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SHLQBII(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("shlqbii %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
2012-11-15 01:39:56 +02:00
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQBYI(u32 rt, u32 ra, s32 i7)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqbyi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ROTQMBYI(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("rotqmbyi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SHLQBYI(u32 rt, u32 ra, s32 i7)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("shlqbyi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void NOP(u32 rt)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("nop %s", spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XOR(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xor %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGTH(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgth %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void EQV(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("eqv %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGTB(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgtb %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SUMB(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("sumb %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLZ(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clz %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XSWD(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xswd %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XSHW(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xshw %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CNTB(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cntb %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XSBH(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xsbh %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLGT(u32 rt, u32 ra, u32 rb)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ANDC(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("andc %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FCGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fcgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFCGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfcgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FA(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fa %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FS(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fs %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FM(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fm %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLGTH(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clgth %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ORC(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("orc %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FCMGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fcmgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFCMGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfcmgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFA(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfa %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFS(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfs %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFM(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfm %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLGTB(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clgtb %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HLGT(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hlgt %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFMA(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfma %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFMS(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfms %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFNMS(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfnms %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFNMA(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfnma %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CEQ(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ceq %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYHHU(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyhhu %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ADDX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("addx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SFX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("sfx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BGX(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("bgx %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYHHA(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyhha %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYHHAU(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyhhau %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FSCRRD(u32 rt)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fscrrd %s", spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FESD(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fesd %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FRDS(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("frds %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FSCRWR(u32 rt, u32 ra)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fscrwr %s,%s", spu_reg_name[rt], spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFTSV(u32 rt, u32 ra, s32 i7)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dftsv %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i7));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FCEQ(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fceq %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFCEQ(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfceq %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPY(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpy %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYH(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyh %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYHH(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyhh %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYS(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpys %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CEQH(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ceqh %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FCMEQ(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fcmeq %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void DFCMEQ(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("dfcmeq %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYU(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyu %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CEQB(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ceqb %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FI(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fi %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HEQ(u32 rt, u32 ra, u32 rb)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("heq %s,%s,%s", spu_reg_name[rt], spu_reg_name[ra], spu_reg_name[rb]));
|
|
|
|
|
}
|
|
|
|
|
|
2013-07-04 17:20:36 +03:00
|
|
|
//0 - 9
|
|
|
|
|
void CFLTS(u32 rt, u32 ra, s32 i8)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cflts %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i8));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CFLTU(u32 rt, u32 ra, s32 i8)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cfltu %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i8));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CSFLT(u32 rt, u32 ra, s32 i8)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("csflt %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i8));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CUFLT(u32 rt, u32 ra, s32 i8)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cuflt %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i8));
|
|
|
|
|
}
|
2012-11-15 01:39:56 +02:00
|
|
|
|
|
|
|
|
//0 - 8
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRZ(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("brz %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void STQA(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("stqa %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRNZ(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("brnz %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRHZ(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("brhz %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRHNZ(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("brhnz %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void STQR(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("stqr %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRA(s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("bra 0x%x", DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void LQA(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("lqa %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRASL(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("brasl %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BR(s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("br 0x%x", DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FSMBI(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fsmbi %s,%d", spu_reg_name[rt], i16));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void BRSL(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("brsl %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void LQR(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("lqr %s,0x%x", spu_reg_name[rt], DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void IL(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("il %s,%d", spu_reg_name[rt], i16));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ILHU(u32 rt, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
2013-06-30 11:46:29 +03:00
|
|
|
Write(wxString::Format("ilhu %s,%d", spu_reg_name[rt], i16));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ILH(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ilh %s,%d", spu_reg_name[rt], i16));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void IOHL(u32 rt, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("iolh %s,%d", spu_reg_name[rt], i16));
|
2012-11-15 01:39:56 +02:00
|
|
|
}
|
2013-06-30 11:46:29 +03:00
|
|
|
|
2012-11-15 01:39:56 +02:00
|
|
|
|
|
|
|
|
//0 - 7
|
2013-07-04 17:20:36 +03:00
|
|
|
void ORI(u32 rt, u32 ra, s32 i10)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ori %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ORHI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("orhi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ORBI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("orbi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SFI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("sfi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SFHI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("sfhi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ANDI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("andi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ANDHI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("andhi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ANDBI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("andbi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void AI(u32 rt, u32 ra, s32 i10)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ai %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void AHI(u32 rt, u32 ra, s32 i10)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ahi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void STQD(u32 rt, s32 i10, u32 ra)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("stqd %s,%d(%s)", spu_reg_name[rt], i10, spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void LQD(u32 rt, s32 i10, u32 ra)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("lqd %s,%d(%s)", spu_reg_name[rt], i10, spu_reg_name[ra]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XORI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xori %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XORHI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xorhi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void XORBI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("xorbi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGTI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgti %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGTHI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgthi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CGTBI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("cgtbi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HGTI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hgti %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLGTI(u32 rt, u32 ra, s32 i10)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clgti %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLGTHI(u32 rt, u32 ra, s32 i10)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clgthi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CLGTBI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("clgtbi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HLGTI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hlgti %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYUI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpyui %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CEQI(u32 rt, u32 ra, s32 i10)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ceqi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CEQHI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ceqhi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void CEQBI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ceqbi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HEQI(u32 rt, u32 ra, s32 i10)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("heqi %s,%s,%d", spu_reg_name[rt], spu_reg_name[ra], i10));
|
|
|
|
|
}
|
2012-11-15 01:39:56 +02:00
|
|
|
|
|
|
|
|
//0 - 6
|
2013-07-04 17:20:36 +03:00
|
|
|
void HBRA(s32 ro, s32 i16)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hbra 0x%x,0x%x", DisAsmBranchTarget(ro), DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void HBRR(s32 ro, s32 i16)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("hbrr 0x%x,0x%x", DisAsmBranchTarget(ro), DisAsmBranchTarget(i16)));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void ILA(u32 rt, s32 i18)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("ila %s,%d", spu_reg_name[rt], i18));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//0 - 3
|
2013-07-04 17:20:36 +03:00
|
|
|
void SELB(u32 rc, u32 ra, u32 rb, u32 rt)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("selb %s,%s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb], spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void SHUFB(u32 rc, u32 ra, u32 rb, u32 rt)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("shufb %s,%s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb], spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void MPYA(u32 rc, u32 ra, u32 rb, u32 rt)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("mpya %s,%s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb], spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FNMS(u32 rc, u32 ra, u32 rb, u32 rt)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fnms %s,%s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb], spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FMA(u32 rc, u32 ra, u32 rb, u32 rt)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fma %s,%s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb], spu_reg_name[rt]));
|
|
|
|
|
}
|
2013-07-04 17:20:36 +03:00
|
|
|
void FMS(u32 rc, u32 ra, u32 rb, u32 rt)
|
2013-06-30 11:46:29 +03:00
|
|
|
{
|
|
|
|
|
Write(wxString::Format("fms %s,%s,%s,%s", spu_reg_name[rc], spu_reg_name[ra], spu_reg_name[rb], spu_reg_name[rt]));
|
|
|
|
|
}
|
2012-11-15 01:39:56 +02:00
|
|
|
|
2013-07-04 17:20:36 +03:00
|
|
|
void UNK(u32 code, u32 opcode, u32 gcode)
|
2012-11-15 01:39:56 +02:00
|
|
|
{
|
2013-07-04 17:20:36 +03:00
|
|
|
Write(wxString::Format("Unknown/Illegal opcode! (0x%08x, 0x%x, 0x%x)", code, opcode, gcode));
|
2012-11-15 01:39:56 +02:00
|
|
|
}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#undef START_OPCODES_GROUP
|
|
|
|
|
#undef END_OPCODES_GROUP
|