mirror of
https://github.com/RPCSX/rpcsx.git
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277 lines
8.3 KiB
C
277 lines
8.3 KiB
C
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#pragma once
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#include "Gui/DisAsmFrame.h"
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#include "Emu/Memory/Memory.h"
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enum DisAsmModes
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{
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DumpMode,
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InterpreterMode,
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NormalMode,
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CompilerElfMode,
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};
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class DisAsm
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{
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protected:
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DisAsmFrame* disasm_frame;
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const DisAsmModes m_mode;
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virtual void Write(const wxString value)
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{
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switch(m_mode)
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{
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case DumpMode:
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{
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wxString mem = wxString::Format("\t%x:\t", dump_pc);
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for(u8 i=0; i < 4; ++i)
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{
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mem += wxString::Format("%02x", Memory.Read8(dump_pc + i));
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if(i < 3) mem += " ";
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}
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last_opcode = mem + "\t" + value + "\n";
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}
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break;
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case InterpreterMode:
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{
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wxString mem = wxString::Format("[%x] ", dump_pc);
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for(u8 i=0; i < 4; ++i)
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{
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mem += wxString::Format("%02x", Memory.Read8(dump_pc + i));
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if(i < 3) mem += " ";
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}
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last_opcode = mem + ": " + value;
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}
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break;
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case CompilerElfMode: last_opcode = value + "\n"; break;
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default: if(disasm_frame) disasm_frame->AddLine(value); break;
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}
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}
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public:
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wxString last_opcode;
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uint dump_pc;
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protected:
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DisAsm(PPCThread& cpu, DisAsmModes mode = NormalMode)
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: m_mode(mode)
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, disasm_frame(NULL)
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{
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if(m_mode != NormalMode) return;
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disasm_frame = new DisAsmFrame(cpu);
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disasm_frame->Show();
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}
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virtual u32 DisAsmBranchTarget(const s32 imm)=0;
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wxString FixOp(wxString op)
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{
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op.Append(' ', max<int>(8 - op.Len(), 0));
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return op;
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}
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void DisAsm_V3(const wxString& op, OP_REG v0, OP_REG v1, OP_REG v2)
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{
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Write(wxString::Format("%s v%d,v%d,v%d", FixOp(op), v0, v1, v2));
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}
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void DisAsm_V1_R2(const wxString& op, OP_REG v0, OP_REG r1, OP_REG r2)
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{
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Write(wxString::Format("%s v%d,r%d,r%d", FixOp(op), v0, r1, r2));
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}
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void DisAsm_CR1_F2_RC(const wxString& op, OP_REG cr0, OP_REG f0, OP_REG f1, bool rc)
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{
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Write(wxString::Format("%s%s cr%d,f%d,f%d", FixOp(op), rc ? "." : "", cr0, f0, f1));
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}
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void DisAsm_CR1_F2(const wxString& op, OP_REG cr0, OP_REG f0, OP_REG f1)
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{
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DisAsm_CR1_F2_RC(op, cr0, f0, f1, false);
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}
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void DisAsm_INT1_R2(const wxString& op, OP_REG i0, OP_REG r0, OP_REG r1)
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{
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Write(wxString::Format("%s %d,r%d,r%d", FixOp(op), i0, r0, r1));
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}
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void DisAsm_INT1_R1_IMM(const wxString& op, OP_REG i0, OP_REG r0, OP_sIMM imm0)
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{
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Write(wxString::Format("%s %d,r%d,%d #%x", FixOp(op), i0, r0, imm0, imm0));
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}
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void DisAsm_INT1_R1_RC(const wxString& op, OP_REG i0, OP_REG r0, bool rc)
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{
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Write(wxString::Format("%s%s %d,r%d", FixOp(op), rc ? "." : "", i0, r0));
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}
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void DisAsm_INT1_R1(const wxString& op, OP_REG i0, OP_REG r0)
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{
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DisAsm_INT1_R1_RC(op, i0, r0, false);
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}
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void DisAsm_F4_RC(const wxString& op, OP_REG f0, OP_REG f1, OP_REG f2, OP_REG f3, bool rc)
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{
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Write(wxString::Format("%s%s f%d,f%d,f%d,f%d", FixOp(op), rc ? "." : "", f0, f1, f2, f3));
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}
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void DisAsm_F3_RC(const wxString& op, OP_REG f0, OP_REG f1, OP_REG f2, bool rc)
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{
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Write(wxString::Format("%s%s f%d,f%d,f%d", FixOp(op), rc ? "." : "", f0, f1, f2));
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}
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void DisAsm_F3(const wxString& op, OP_REG f0, OP_REG f1, OP_REG f2)
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{
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DisAsm_F3_RC(op, f0, f1, f2, false);
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}
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void DisAsm_F2_RC(const wxString& op, OP_REG f0, OP_REG f1, bool rc)
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{
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Write(wxString::Format("%s%s f%d,f%d", FixOp(op), rc ? "." : "", f0, f1));
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}
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void DisAsm_F2(const wxString& op, OP_REG f0, OP_REG f1)
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{
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DisAsm_F2_RC(op, f0, f1, false);
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}
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void DisAsm_F1_R2(const wxString& op, OP_REG f0, OP_REG r0, OP_REG r1)
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{
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if(m_mode == CompilerElfMode)
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{
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Write(wxString::Format("%s f%d,r%d,r%d", FixOp(op), f0, r0, r1));
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return;
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}
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Write(wxString::Format("%s f%d,r%d(r%d)", FixOp(op), f0, r0, r1));
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}
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void DisAsm_F1_IMM_R1_RC(const wxString& op, OP_REG f0, OP_sIMM imm0, OP_REG r0, bool rc)
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{
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if(m_mode == CompilerElfMode)
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{
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Write(wxString::Format("%s%s f%d,r%d,%d #%x", FixOp(op), rc ? "." : "", f0, r0, imm0, imm0));
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return;
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}
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Write(wxString::Format("%s%s f%d,%d(r%d) #%x", FixOp(op), rc ? "." : "", f0, imm0, r0, imm0));
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}
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void DisAsm_F1_IMM_R1(const wxString& op, OP_REG f0, OP_sIMM imm0, OP_REG r0)
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{
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DisAsm_F1_IMM_R1_RC(op, f0, imm0, r0, false);
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}
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void DisAsm_F1_RC(const wxString& op, OP_REG f0, bool rc)
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{
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Write(wxString::Format("%s%s f%d", FixOp(op), rc ? "." : "", f0));
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}
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void DisAsm_R1_RC(const wxString& op, OP_REG r0, bool rc)
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{
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Write(wxString::Format("%s%s r%d", FixOp(op), rc ? "." : "", r0));
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}
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void DisAsm_R1(const wxString& op, OP_REG r0)
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{
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DisAsm_R1_RC(op, r0, false);
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}
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void DisAsm_R2_OE_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_REG oe, bool rc)
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{
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Write(wxString::Format("%s%s%s r%d,r%d", FixOp(op), oe ? "o" : "", rc ? "." : "", r0, r1));
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}
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void DisAsm_R2_RC(const wxString& op, OP_REG r0, OP_REG r1, bool rc)
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{
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DisAsm_R2_OE_RC(op, r0, r1, false, rc);
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}
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void DisAsm_R2(const wxString& op, OP_REG r0, OP_REG r1)
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{
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DisAsm_R2_RC(op, r0, r1, false);
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}
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void DisAsm_R3_OE_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_REG r2, OP_REG oe, bool rc)
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{
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Write(wxString::Format("%s%s%s r%d,r%d,r%d", FixOp(op), oe ? "o" : "", rc ? "." : "", r0, r1, r2));
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}
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void DisAsm_R3_INT2_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_REG r2, OP_sIMM i0, OP_sIMM i1, bool rc)
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{
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Write(wxString::Format("%s%s r%d,r%d,r%d,%d,%d", FixOp(op), rc ? "." : "", r0, r1, r2, i0, i1));
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}
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void DisAsm_R3_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_REG r2, bool rc)
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{
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DisAsm_R3_OE_RC(op, r0, r1, r2, false, rc);
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}
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void DisAsm_R3(const wxString& op, OP_REG r0, OP_REG r1, OP_REG r2)
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{
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DisAsm_R3_RC(op, r0, r1, r2, false);
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}
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void DisAsm_R2_INT3_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM i0, OP_sIMM i1, OP_sIMM i2, bool rc)
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{
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Write(wxString::Format("%s%s r%d,r%d,%d,%d,%d", FixOp(op), rc ? "." : "", r0, r1, i0, i1, i2));
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}
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void DisAsm_R2_INT3(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM i0, OP_sIMM i1, OP_sIMM i2)
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{
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DisAsm_R2_INT3_RC(op, r0, r1, i0, i1, i2, false);
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}
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void DisAsm_R2_INT2_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM i0, OP_sIMM i1, bool rc)
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{
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Write(wxString::Format("%s%s r%d,r%d,%d,%d", FixOp(op), rc ? "." : "", r0, r1, i0, i1));
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}
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void DisAsm_R2_INT2(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM i0, OP_sIMM i1)
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{
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DisAsm_R2_INT2_RC(op, r0, r1, i0, i1, false);
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}
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void DisAsm_R2_INT1_RC(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM i0, bool rc)
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{
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Write(wxString::Format("%s%s r%d,r%d,%d", FixOp(op), rc ? "." : "", r0, r1, i0));
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}
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void DisAsm_R2_INT1(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM i0)
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{
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DisAsm_R2_INT1_RC(op, r0, r1, i0, false);
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}
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void DisAsm_R2_IMM(const wxString& op, OP_REG r0, OP_REG r1, OP_sIMM imm0)
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{
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if(m_mode == CompilerElfMode)
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{
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Write(wxString::Format("%s r%d,r%d,%d #%x", FixOp(op), r0, r1, imm0, imm0));
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return;
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}
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Write(wxString::Format("%s r%d,%d(r%d) #%x", FixOp(op), r0, imm0, r1, imm0));
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}
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void DisAsm_R1_IMM(const wxString& op, OP_REG r0, OP_sIMM imm0)
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{
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Write(wxString::Format("%s r%d,%d #%x", FixOp(op), r0, imm0, imm0));
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}
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void DisAsm_IMM_R1(const wxString& op, OP_sIMM imm0, OP_REG r0)
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{
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Write(wxString::Format("%s %d,r%d #%x", FixOp(op), imm0, r0, imm0));
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}
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void DisAsm_CR1_R1_IMM(const wxString& op, OP_REG cr0, OP_REG r0, OP_sIMM imm0)
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{
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Write(wxString::Format("%s cr%d,r%d,%d #%x", FixOp(op), cr0, r0, imm0, imm0));
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}
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void DisAsm_CR1_R2_RC(const wxString& op, OP_REG cr0, OP_REG r0, OP_REG r1, bool rc)
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{
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Write(wxString::Format("%s%s cr%d,r%d,r%d", FixOp(op), rc ? "." : "", cr0, r0, r1));
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}
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void DisAsm_CR1_R2(const wxString& op, OP_REG cr0, OP_REG r0, OP_REG r1)
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{
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DisAsm_CR1_R2_RC(op, cr0, r0, r1, false);
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}
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void DisAsm_CR2(const wxString& op, OP_REG cr0, OP_REG cr1)
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{
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Write(wxString::Format("%s cr%d,cr%d", FixOp(op), cr0, cr1));
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}
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void DisAsm_INT3(const wxString& op, const int i0, const int i1, const int i2)
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{
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Write(wxString::Format("%s %d,%d,%d", FixOp(op), i0, i1, i2));
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}
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void DisAsm_INT1(const wxString& op, const int i0)
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{
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Write(wxString::Format("%s %d", FixOp(op), i0));
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}
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void DisAsm_BRANCH(const wxString& op, const int pc)
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{
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Write(wxString::Format("%s 0x%x", FixOp(op), DisAsmBranchTarget(pc)));
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}
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void DisAsm_BRANCH_A(const wxString& op, const int pc)
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{
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Write(wxString::Format("%s 0x%x", FixOp(op), pc));
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}
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void DisAsm_B2_BRANCH(const wxString& op, OP_REG b0, OP_REG b1, const int pc)
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{
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Write(wxString::Format("%s %d,%d,0x%x ", FixOp(op), b0, b1, DisAsmBranchTarget(pc)));
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}
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void DisAsm_CR_BRANCH(const wxString& op, OP_REG cr, const int pc)
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{
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Write(wxString::Format("%s cr%d,0x%x ", FixOp(op), cr, DisAsmBranchTarget(pc)));
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}
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};
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