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Peter Maydell fe98885ff2
target/arm: Convert VFP two-register transfer insns to decodetree 
Convert the VFP two-register transfer instructions to decodetree
(in the v8 Arm ARM these are the "Advanced SIMD and floating-point
64-bit move" encoding group).

Again, we expand out the sequences involving gen_vfp_msr() and
gen_msr_vfp().

Backports commit 81f681106eabe21c55118a5a41999fb7387fb714 from qemu
2019-06-13 17:20:00 -04:00
..
arm target/arm: Convert VFP two-register transfer insns to decodetree 2019-06-13 17:20:00 -04:00
i386 cpu: Introduce CPUNegativeOffsetState 2019-06-13 15:08:25 -04:00
m68k cpu: Introduce CPUNegativeOffsetState 2019-06-13 15:08:25 -04:00
mips cpu: Introduce CPUNegativeOffsetState 2019-06-13 15:08:25 -04:00
riscv cpu: Introduce CPUNegativeOffsetState 2019-06-13 15:08:25 -04:00
sparc cpu: Introduce CPUNegativeOffsetState 2019-06-13 15:08:25 -04:00