Xiaoyao Li d9d68cc128 i386/cpu: Clear FEAT_XSAVE_COMP_{LO,HI} when XSAVE is not available ... Per Intel SDM vol 1, 13.2, if CPUID.1:ECX.XSAVE[bit 26] is 0, the processor provides no further enumeration through CPUID function 0DH. QEMU does not do this for "-cpu host,-xsave". Backports 19ca8285fcd61a8f60f2f44f789a561e0958e8e6		2021-03-01 19:04:03 -05:00
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arm	target/arm: Set instance_align on CPUARM TypeInfo	2021-03-01 18:58:44 -05:00
i386	i386/cpu: Clear FEAT_XSAVE_COMP_{LO,HI} when XSAVE is not available	2021-03-01 19:04:03 -05:00
m68k	target/m68k: consolidate physical translation offset into get_physical_address()	2021-02-25 23:13:48 -05:00
mips	target/mips: Support variable page size	2020-06-14 21:09:51 -04:00
riscv	target/riscv: Set instance_align on RISCVCPU TypeInfo	2021-03-01 19:00:27 -05:00
sparc	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00