Aaron Lindsay 9727b7c3e0 target/arm: PMU: Set PMCR.N to 4 ... This both advertises that we support four counters and enables them because the pmu_num_counters() reads this value from PMCR. Backports commit ac689a2e5155d129acaa39603e2a7a29abd90d89 from qemu		2019-01-22 18:55:34 -05:00
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arm	target/arm: PMU: Set PMCR.N to 4	2019-01-22 18:55:34 -05:00
i386	i386/kvm: add a comment explaining why .feat_names are commented out for Hyper-V feature bits	2019-01-14 15:02:35 -05:00
m68k	m68k: Silence compiler warnings	2018-11-16 21:23:55 -05:00
mips	target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions	2019-01-05 08:07:56 -05:00
sparc	Sparc increase ttl number	2018-10-06 04:55:52 -04:00