Richard Henderson 7de60598d5 target/arm: Restrict the values of DCZID.BS under TCG ... We can simplify our DC_ZVA if we recognize that the largest BS that we actually use in system mode is 64. Let us just assert that it fits within TARGET_PAGE_SIZE. For DC_GVA and STZGM, we want to be able to write whole bytes of tag memory, so assert that BS is >= 2 * TAG_GRANULE, or 32. Backports commit a4157b80242bf1c8aa0ee77aae7458ba79012d5d from qemu		2021-02-25 15:12:20 -05:00
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arm	target/arm: Restrict the values of DCZID.BS under TCG	2021-02-25 15:12:20 -05:00
i386	target/i386: reimplement fpatan using floatx80 operations	2021-02-25 13:48:32 -05:00
m68k	softfloat: merge floatx80_mod and floatx80_rem	2021-02-25 13:34:05 -05:00
mips	target/mips: Support variable page size	2020-06-14 21:09:51 -04:00
riscv	target/riscv: Implement checks for hfence	2021-02-25 12:03:57 -05:00
sparc	softfloat: Name compare relation enum	2020-05-21 18:08:52 -04:00