unicorn/qemu/target-arm
Peter Maydell 64a9bec68a
target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode
In helper.c the expression
(env->uncached_cpsr & CPSR_M) != CPSR_USER
is always true; the right hand side was supposed to be ARM_CPU_MODE_USR
(an error in commit cb01d391).

Since the incorrect expression was always true, this just meant that
commit cb01d391 had no effect.

However simply changing the RHS here would reveal a logic error: if
the mode is USR we wish to completely ignore the attempt to set the
mode bits, which means that we must clear the CPSR_M bits from mask
to avoid the uncached_cpsr bits being updated at the end of the
function.

Move the condition into the correct place in the code, fix its RHS
constant, and add a comment about the fact that we must be doing a
gdbstub write if we're in user mode.

Backports commit 8c4f0eb94cc65ee32a12feba88d0b32e3665d5ea from qemu
2018-02-21 01:57:34 -05:00
..
arm_ldst.h import 2015-08-21 15:04:50 +08:00
cpu-qom.h target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEF 2018-02-20 22:49:43 -05:00
cpu.c target-arm: Add the pmceid0 and pmceid1 registers 2018-02-20 15:22:41 -05:00
cpu.h target-arm: Fix handling of SDCR for 32-bit code 2018-02-20 22:26:58 -05:00
cpu64.c target-arm: Add the pmceid0 and pmceid1 registers 2018-02-20 15:22:41 -05:00
crypto_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
helper-a64.c target-arm: Move aarch64_cpu_do_interrupt() to helper.c 2018-02-18 22:23:06 -05:00
helper-a64.h import 2015-08-21 15:04:50 +08:00
helper.c target-arm: Correct handling of writes to CPSR mode bits from gdb in usermode 2018-02-21 01:57:34 -05:00
helper.h target-arm: Give CPSR setting on 32-bit exception return its own helper 2018-02-20 22:08:35 -05:00
internals.h target-arm: Move get/set_r13_banked() to op_helper.c 2018-02-20 15:09:07 -05:00
iwmmxt_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
kvm-consts.h import 2015-08-21 15:04:50 +08:00
Makefile.objs delete sparc32_dma.h & arm-semi.c 2017-01-19 15:10:41 +08:00
neon_helper.c target-arm: Clean up includes 2018-02-17 21:09:32 -05:00
op_addsub.h import 2015-08-21 15:04:50 +08:00
op_helper.c target-arm: Raw CPSR writes should skip checks and bank switching 2018-02-20 22:17:48 -05:00
psci.c import 2015-08-21 15:04:50 +08:00
translate-a64.c target-arm: Add isread parameter to CPAccessFns 2018-02-20 11:24:17 -05:00
translate.c target-arm: Give CPSR setting on 32-bit exception return its own helper 2018-02-20 22:08:35 -05:00
translate.h tcg: Remove gen_intermediate_code_pc 2018-02-17 15:23:59 -05:00
unicorn.h arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
unicorn_aarch64.c target-arm: Add write_type argument to cpsr_write() 2018-02-20 22:15:53 -05:00
unicorn_arm.c target-arm: Add write_type argument to cpsr_write() 2018-02-20 22:15:53 -05:00