Palmer Dabbelt 5b59f956b3 RISC-V: Add support for the Zifencei extension ... fence.i has been split out of the base ISA as part of the ratification process. This patch adds a Zifencei argument, which disables the fence.i instruction. Backports commit 50fba816cd226001bec3e495c39879deb2fa5432 from qemu		2019-08-08 17:09:09 -04:00
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arm	target/arm: Declare some M-profile functions publicly	2019-08-08 15:37:01 -04:00
i386	target/i386: define a new MSR based feature word - FEAT_CORE_CAPABILITY	2019-06-25 18:59:52 -05:00
m68k	m68k comments break patch submission due to being incorrectly formatted	2019-08-08 14:26:45 -04:00
mips	target/mips: Correct helper for MSA FCLASS.<W|D> instructions	2019-08-08 16:30:15 -04:00
riscv	RISC-V: Add support for the Zifencei extension	2019-08-08 17:09:09 -04:00
sparc	cpu: Introduce CPUNegativeOffsetState	2019-06-13 15:08:25 -04:00