Clement Deschamps 1d97d223c3 target/arm: add PMU feature to cortex-r5 and cortex-r5f ... The PMU is not optional on cortex-r5 and cortex-r5f (see the "Features" chapter of the Technical Reference Manual). Backports commit 90f671581ac601fcc1b840d9e9abe7e3c3e672db from qemu		2020-03-21 12:16:11 -04:00
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arm	target/arm: add PMU feature to cortex-r5 and cortex-r5f	2020-03-21 12:16:11 -04:00
i386	check arguments, return error instead of raising exceptions. (#1125)	2020-01-14 09:00:11 -05:00
m68k	m68k: Fix regression causing Single-Step via GDB/RSP to not single step	2020-03-21 12:15:08 -04:00
mips	target/mips: Hard code size with MO_{8|16|32|64}	2020-01-07 18:30:39 -05:00
riscv	tcg: TCGMemOp is now accelerator independent MemOp	2019-11-28 03:01:12 -05:00
sparc	target/sparc: sun4u Invert Endian TTE bit	2020-01-07 19:21:30 -05:00