From fd5b0dd4563975125f1f233bc997b314337e21d6 Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Thu, 25 Feb 2021 23:15:44 -0500 Subject: [PATCH] target/i386: set SSE FTZ in correct floating-point state The code to set floating-point state when MXCSR changes calls set_flush_to_zero on &env->fp_status, so affecting the x87 floating-point state rather than the SSE state. Fix to call it for &env->sse_status instead. Backports commit 3ddc0eca2229846bfecc3485648a6cb85a466dc7 from qemu --- qemu/target/i386/fpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu/target/i386/fpu_helper.c b/qemu/target/i386/fpu_helper.c index dcb976e4..496a2b0b 100644 --- a/qemu/target/i386/fpu_helper.c +++ b/qemu/target/i386/fpu_helper.c @@ -2928,7 +2928,7 @@ void update_mxcsr_status(CPUX86State *env) set_flush_inputs_to_zero((mxcsr & SSE_DAZ) ? 1 : 0, &env->sse_status); /* set flush to zero */ - set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status); + set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->sse_status); } void helper_ldmxcsr(CPUX86State *env, uint32_t val)