From f95e0e9e980f40cd9056e8d4d9137ff413c0d04e Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Sat, 24 Feb 2018 21:32:07 -0500 Subject: [PATCH] target-mips: Add FCR31's FS bit definition Add preprocessor definition of FCR31's FS bit, and update related code for setting this bit. Backports commit 77be419980114d75605811e1681115d0919cfa1a from qemu --- qemu/target-mips/cpu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/qemu/target-mips/cpu.h b/qemu/target-mips/cpu.h index a6bccb6c..db88dba5 100644 --- a/qemu/target-mips/cpu.h +++ b/qemu/target-mips/cpu.h @@ -114,6 +114,7 @@ struct CPUMIPSFPUContext { /* fcsr */ uint32_t fcr31_rw_bitmask; uint32_t fcr31; +#define FCR31_FS 24 #define FCR31_ABS2008 19 #define FCR31_NAN2008 18 #define SET_FP_COND(num,env) do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0) @@ -840,7 +841,7 @@ static inline void restore_rounding_mode(CPUMIPSState *env) static inline void restore_flush_mode(CPUMIPSState *env) { - set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0, + set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0, &env->active_fpu.fp_status); }