From f2ec6bc22deb3af3017d36469d84d9d3245b746e Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 21 Nov 2019 16:19:54 -0500 Subject: [PATCH] target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY Simply moving the non-stub helper_v7m_mrs/msr outside of !CONFIG_USER_ONLY is not an option, because of all of the other system-mode helpers that are called. But we can split out a few subroutines to handle the few EL0 accessible registers without duplicating code. Backports commit 04c9c81b8fa2ee33f59a26265700fae6fc646062 from qemu --- qemu/target/arm/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h index 957f3eff..71bc9490 100644 --- a/qemu/target/arm/cpu.h +++ b/qemu/target/arm/cpu.h @@ -1236,6 +1236,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask) if (mask & XPSR_GE) { env->GE = (val & XPSR_GE) >> 16; } +#ifndef CONFIG_USER_ONLY if (mask & XPSR_T) { env->thumb = ((val & XPSR_T) != 0); } @@ -1251,6 +1252,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask) /* Note that this only happens on exception exit */ write_v7m_exception(env, val & XPSR_EXCP); } +#endif } #define HCR_VM (1ULL << 0)