From e9fe7d3c8d731395f3576dd747348844f7213a6f Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 10 Nov 2018 11:26:22 -0500 Subject: [PATCH] target/arm: Only flush tlb if ASID changes Since QEMU does not implement ASIDs, changes to the ASID must flush the tlb. However, if the ASID does not change there is no reason to flush. In testing a boot of the Ubuntu installer to the first menu, this reduces the number of flushes by 30%, or nearly 600k instances. Backports commit 93f379b0c43617b1361f742f261479eaed4959cb from qemu --- qemu/target/arm/helper.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 323c8ffe..52068716 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -2448,12 +2448,10 @@ static void vmsa_tcr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri, static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { - /* 64 bit accesses to the TTBRs can change the ASID and so we - * must flush the TLB. - */ - if (cpreg_field_is_64bit(ri)) { + /* If the ASID changes (with a 64-bit write), we must flush the TLB. */ + if (cpreg_field_is_64bit(ri) && + extract64(raw_read(env, ri) ^ value, 48, 16) != 0) { ARMCPU *cpu = arm_env_get_cpu(env); - tlb_flush(CPU(cpu)); } raw_write(env, ri, value);