From e88063fa05e2a9ddc58e5da4b9150b5427db95a8 Mon Sep 17 00:00:00 2001
From: Eduardo Habkost <ehabkost@redhat.com>
Date: Fri, 16 Feb 2018 16:08:38 -0500
Subject: [PATCH] target-i386: Ensure bit 10 on DR7 is never cleared

Bit 10 of DR7 is documented as always set to 1, so ensure that's
always the case.

Backports commit 9055330ffbf5ca85f024c29874799d9c8bd17aa9 from qemu
---
 qemu/target-i386/bpt_helper.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qemu/target-i386/bpt_helper.c b/qemu/target-i386/bpt_helper.c
index 5ce4ef1f..180a3755 100644
--- a/qemu/target-i386/bpt_helper.c
+++ b/qemu/target-i386/bpt_helper.c
@@ -84,6 +84,8 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
     int i;
     target_ulong old_dr7 = env->dr[7];
 
+    new_dr7 |= DR7_FIXED_1;
+
     /* If nothing is changing except the global/local enable bits,
        then we can make the change more efficient.  */
     if (((old_dr7 ^ new_dr7) & ~0xff) == 0) {