From dfdc6bc05cc2d1b32c0f912474ce243ea896af34 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 10 Nov 2018 10:09:36 -0500 Subject: [PATCH] target/arm: Use gvec for NEON_2RM_VMN, NEON_2RM_VNEG Backports commit 4bf940bebad273e4b3534ae3f83f2c9d1191d3a2 from qemu --- qemu/target/arm/translate.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/qemu/target/arm/translate.c b/qemu/target/arm/translate.c index 2e3e6b3c..45d6b1c7 100644 --- a/qemu/target/arm/translate.c +++ b/qemu/target/arm/translate.c @@ -7665,6 +7665,14 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_temp_free_ptr(tcg_ctx, ptr1); tcg_temp_free_ptr(tcg_ctx, ptr2); break; + + case NEON_2RM_VMVN: + tcg_gen_gvec_not(tcg_ctx, 0, rd_ofs, rm_ofs, vec_size, vec_size); + break; + case NEON_2RM_VNEG: + tcg_gen_gvec_neg(tcg_ctx, size, rd_ofs, rm_ofs, vec_size, vec_size); + break; + default: elementwise: for (pass = 0; pass < (q ? 4 : 2); pass++) { @@ -7705,9 +7713,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) case NEON_2RM_VCNT: gen_helper_neon_cnt_u8(tcg_ctx, tmp, tmp); break; - case NEON_2RM_VMVN: - tcg_gen_not_i32(tcg_ctx, tmp, tmp); - break; case NEON_2RM_VQABS: switch (size) { case 0: @@ -7780,11 +7785,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) default: abort(); } break; - case NEON_2RM_VNEG: - tmp2 = tcg_const_i32(tcg_ctx, 0); - gen_neon_rsb(s, size, tmp, tmp2); - tcg_temp_free_i32(tcg_ctx, tmp2); - break; case NEON_2RM_VCGT0_F: { TCGv_ptr fpstatus = get_fpstatus_ptr(s, 1);