From d4a8f1bfcb1743e671e0afee90e5c7178f76c4e2 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 3 Jul 2018 04:46:39 -0400 Subject: [PATCH] target/arm: Enable SVE for aarch64-linux-user Enable ARM_FEATURE_SVE for the generic "max" cpu. Backports commit 802ac0e1e956f3b34a7cb0eda4ec28a60aa87a0a from qemu --- qemu/target/arm/cpu.c | 7 +++++++ qemu/target/arm/cpu64.c | 1 + 2 files changed, 8 insertions(+) diff --git a/qemu/target/arm/cpu.c b/qemu/target/arm/cpu.c index 6a768e56..aeea99da 100644 --- a/qemu/target/arm/cpu.c +++ b/qemu/target/arm/cpu.c @@ -156,6 +156,13 @@ static void arm_cpu_reset(CPUState *s) env->cp15.sctlr_el[1] |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE; /* and to the FP/Neon instructions */ env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 20, 2, 3); + /* and to the SVE instructions */ + env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3); + env->cp15.cptr_el[3] |= CPTR_EZ; + /* with maximum vector length */ + env->vfp.zcr_el[1] = ARM_MAX_VQ - 1; + env->vfp.zcr_el[2] = ARM_MAX_VQ - 1; + env->vfp.zcr_el[3] = ARM_MAX_VQ - 1; #else /* Reset into the highest available EL */ if (arm_feature(env, ARM_FEATURE_EL3)) { diff --git a/qemu/target/arm/cpu64.c b/qemu/target/arm/cpu64.c index 7759b35b..1deb369a 100644 --- a/qemu/target/arm/cpu64.c +++ b/qemu/target/arm/cpu64.c @@ -225,6 +225,7 @@ static void aarch64_max_initfn(struct uc_struct *uc, Object *obj, void *opaque) set_feature(&cpu->env, ARM_FEATURE_V8_RDM); set_feature(&cpu->env, ARM_FEATURE_V8_FP16); set_feature(&cpu->env, ARM_FEATURE_V8_FCMA); + set_feature(&cpu->env, ARM_FEATURE_SVE); /* For usermode -cpu max we can use a larger and more efficient DCZ * blocksize since we don't have to follow what the hardware does. */