From d3a5843aebfccef18aba48c0a5491b3038197404 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sun, 22 Mar 2020 03:20:03 -0400 Subject: [PATCH] target/arm: Replicate TBI/TBID bits for single range regimes Replicate the single TBI bit from TCR_EL2 and TCR_EL3 so that we can unconditionally use pointer bit 55 to index into our composite TBI1:TBI0 field. Backports commit 3e270f67f0f05277021763af119a6ce195f8ed51 from qemu --- qemu/target/arm/helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 63585c15..133eac7d 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -10329,7 +10329,8 @@ static int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx) } else if (mmu_idx == ARMMMUIdx_Stage2) { return 0; /* VTCR_EL2 */ } else { - return extract32(tcr, 20, 1); + /* Replicate the single TBI bit so we always have 2 bits. */ + return extract32(tcr, 20, 1) * 3; } } @@ -10340,7 +10341,8 @@ static int aa64_va_parameter_tbid(uint64_t tcr, ARMMMUIdx mmu_idx) } else if (mmu_idx == ARMMMUIdx_Stage2) { return 0; /* VTCR_EL2 */ } else { - return extract32(tcr, 29, 1); + /* Replicate the single TBID bit so we always have 2 bits. */ + return extract32(tcr, 29, 1) * 3; } }