diff --git a/qemu/include/qom/cpu.h b/qemu/include/qom/cpu.h
index e9cce746..554adfd2 100644
--- a/qemu/include/qom/cpu.h
+++ b/qemu/include/qom/cpu.h
@@ -97,6 +97,8 @@ struct TranslationBlock;
  *       associated memory transaction attributes to use for the access.
  *       CPUs which use memory transaction attributes should implement this
  *       instead of get_phys_page_debug.
+ * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
+ *       a memory access with the specified memory transaction attributes.
  * @debug_excp_handler: Callback for handling debug exceptions.
  * @vmsd: State description for migration.
  * @cpu_exec_enter: Callback for cpu_exec preparation.
@@ -137,6 +139,7 @@ typedef struct CPUClass {
     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
     hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
                                         MemTxAttrs *attrs);
+    int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
     void (*debug_excp_handler)(CPUState *cpu);
 
     const struct VMStateDescription *vmsd;
@@ -446,6 +449,22 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 
     return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
 }
+/** cpu_asidx_from_attrs:
+ * @cpu: CPU
+ * @attrs: memory transaction attributes
+ *
+ * Returns the address space index specifying the CPU AddressSpace
+ * to use for a memory access with the given transaction attributes.
+ */
+static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
+
+    if (cc->asidx_from_attrs) {
+        return cc->asidx_from_attrs(cpu, attrs);
+    }
+    return 0;
+}
 #endif
 
 /**